Implements all the required protocol features
IP has OCP interface for connecting to the System Bus
IP core verified with Denali's Pure Spec™ Verification IP for PCI express through extensive simulations and functional coverage methodology.
Verification environment in Specman's 'e' language with coverage reports.
Validated on Xilinx Virtex4 FPGA
IP core tested with Catalyst PCI express compliance kit.
Proven on a product prototype chip (90nm Technology) for one of our steemed customer.
Customized for bulk data transfer.