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最新IP
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Universal Chiplet Interconnect Express (UCIe) Verification IP
- Supports Universal Chiplet Interconnect Express Specification Version 1.0, February 2022.
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SPMI Verification IP
- Compliant with MIPI SPMI(1.0 and 2.0) specification.
- Supports multi-master and multi-slave model.
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BoW Verification IP
- Compliant to ODSA Transaction and Link Layer Specification for BoW Interfaces and Bunch of Wires (BoW) PHY specification
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USB4 v2.0 Verification IP
- Fully compliant with USB4 specification v2.0 (October 2022) and Connection Manager version 2.0.
- Supports USB3.2 Specification, Revision 1.1 and backward compatibility to USB2.0.
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MASS Solution Verification IP
- Support full functionality of APHY as a physical layer
- Support Different PAL for multiple adaption layers for A-pkt conversion
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UCIe Verification IP
- Available in native SystemVerilog (UVM/OVM /VMM) and Verilog
- Unique development methodology to ensure highest levels of quality
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TCP/TCPSW Verification IP
- Available in native System Verilog (UVM/OVM/ VMM) and Verilog
- Unique development methodology to ensure the highest levels of quality
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Simulation VIP for MIPI SoundWire-I3S
- Support testbench language interfaces for SystemVerilog and UVM
- Generates constrained-random bus traffic with predefined error injection
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Ethernet Preemption Verification IP
- Provides Ethernet fully compliant to 802.3-2018 supporting all media independent interfaces for (1/10/25/40/50/100/200/400/800 G)
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MIPI A-PHY Verification IP
- Supports MIPI A-PHY specification 1.0 and 1.1
- Supports single lane and dual lane, point-to-point and serial communication technology
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Simulation VIP for UCIE
- Support testbench language interfaces for SystemVerilog, UVM
- Callbacks access at multiple TX and RX queue points for scoreboarding and data manipulation
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MIPI I3C Verification IP with IBI feature enabled
- Push-pull mode,
- Open drain switching,
- CCC, command
热门IP
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1
NAND Flash Memory Model
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2
MIPI® HSI VMM based Verification IP
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3
HBM Verification IP
- Host and Device agents
- HBM 2.0 specification supported
- Supports legacy mode and pseudo channel mode
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10
CXL VIP
- Dynamically configurable BFMs supporting CXL Core Specification 1.0
- PCIe 5.0 Base Specification
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11
CXL 3.0 Verification IP
- Available in native SystemVerilog (UVM/OVM/VMM) and Verilog.
- Unique development methodology to ensure the highest levels of quality.
- 24X5 customer support.
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12
VC Verification IP for AMBA 4 AXI
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