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New Verification IP
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Compute Express Link (CXL) Verification IP (VIP)
- Comprehensive Bluetoooth 5 coverage with support for full specification
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TCAM Synthesizable Memory Model
- Supports all the TCAM commands as per the specification
- Supports 100% of TCAM protocol standard
- Supports flexible selection of width and depth
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Multi-Protocol PHY Verification IP
- PIPE specification version 4.3, 4.4.1 and 5.2 supports PHY layer for PCIe (3/4/5), USB 3.x, USB4, SATA, and DP.
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MPEG-2 TS Verification IP
- Full MPEG-2 TS Transmitter and Receiver functionality.
- Supports the combination of the video and audio coding methods defined in Parts 2 and 3 of ISO/IEC 13818
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TileLink Verification IP (VIP)
- Plugs into existing verification environments
- Rapid test bench integration reduces time to first test
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MIPI SPMI Verification IP (VIP)
- SystemVerilog coverage infrastructure for extendable coverage
- Callback-based error injection capability for creation of illegal stimulus from the VIP
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Ethernet 100GPL (802.3ck) Verification IP (VIP)
- SV coverage infrastructure for extendable coverage
- Callback-based error injection capability for creation of illegal stimulus from the VIP
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CXL Verification IP
- Available in native SystemVerilog (UVM/OVM/VMM) and Verilog
- Unique development methodology to ensure highest levels of quality
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Display Port 2.0 Verification IP
- Full Display port 2.0 source device and sink device functionality.
- Supports backward compatibility with previous versions upto DPv1.4a
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Flash Octal SPI (OSPI) Verification IP
- Supports Extended SPI mode as well as Octal SDR and DDR mode (Single I/O and Octal I/O)
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DisplayPort 2.0 Verification IP (VIP)
- Plugs into existing verification environments
- Rapid testbench integration reduces time to first test
- Incorporates expertise acquired through many prior applications
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TPM Verification IP
- Full TPM master device and slave device functionality.
- Compliant to the Trusted Computing Group (TCG) Trusted Platform Module(TPM) Version 1.1b/1.2 and 2.0 Specification
Top Verification IP
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UART UVM Verification IP
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2
AXI VIP (AXI4 + AXI4 Stream + ACE + AXI3)
- Comprehensive support for AMBA AXI3, AXI4, AXI4-Lite, AXI4 Stream, and ACE including BFMs for master, slave, and N-port interconnect
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VC Verification IP for AMBA 4 AXI
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PCIe End Point UVM Verification IP
- Independently controlled egress, ingress traffic, and support for all types of packets.
- PCIe and legacy interrupt support.
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MIPI D-PHY Verification IP
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I2C Master and Slave OVM/UVM Verification IP
- Highly Flexible, Independent and Configurable I2C Master VIP
- Proven against Silicon Proven VIP
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VC Verification IP for I2C
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Source Code Test Suites AXI Interconnect
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PCI Express 4.0/3.1 VIP (PCIe)
- Comprehensive support for PCI Express standard for 1.1, 2.1, 3.0, SR-IOV, SOP/PQI, and Intel PIPE PHY including BFMs for N-port Root Complex, Endpoint, SR-IOV Endpoint, N-port Switch, and PIPE-compliant PH
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AMBA AXI 4.0 Verification IP
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11
AMBA AHB Verification IP
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12
Synopsys Verification IP for LPDDR4
- August 2014 JEDEC LPDDR4 Standard
- 4Gb to 32Gb densities and x16 SRAM devices
¹ Top Verification IP Over the Last Two Weeks (Last update: May. 31)
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