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SM4-XTS Multi-Booster

• ASIC and FPGA
• High throughput
• Scalable solution

MIPI D-PHY Transmitter 2.5Gbps 4-Lane

• MIPI-DPHY v1-2 / MIPI CSI2 compliant
• TPSCo 65nm BSB

Wireline Transceiver

• Digital PSK demodulation.
• Digital modulator.
• gmC based receive filter.

PHY/PCS Physical Coding Sublayer Logical Sub-Block for PCIe

• Compliant to the PIPE 5.2 Specification with Low Pin Count interface
• Compliant to the PIPE 4.4.1 Specification

12 / 10 / 8-bit Reconfigurable SAR ADC 1.7MS/s (12-bit Mode) 2.8MS/s (8-bit Mode)

• TSMC 22nm ULL Process
• 0.8V Core Supply
• 1.6V to 3.6V I/O Supply

USB 3.1 PHY (10G/5G) IP in Samsung 5LPE

• Supports 10 Gbps and 5 Gbps data rates
• x1 and x2 configurations (USB 3.1 PHY only)
• Low active and standby power

Full Deterministic TSN Switch

• Scalable Up to 24 Ports (1G/10G)
• Full hardware design
• Very small Footprint

14b, 4Gsps, Self-Calibrating Current Steering IQ DAC in 8nm Process

• Samsung 8nm LPP process
• Metal Scheme: 1p8m_5x2z
• 14b Resolution, Fs = 4Gsps

Bandgap Voltage / Current Reference TSMC

• Configurable to your specification
• High accuracy and PSRR
• Configurable output voltage

10-bit 160MS/s Single ADC

• SMIC 40nm LL Process (Low Leakage)
• 1.1V and 3.3V Supplies
• 10-bit High-Speed SAR ADC

250Mbps to 8.1Gbps Multiprotocol SerDes Wirebond PMA

• Layout for wirebond packaging
• Very wide CDR range -- operates with data rates from 0.25Gbps to 8.1Gbps

Temperature Sensor SMIC

• Configurable to your specification
• Customised design for simple SoC integration
• Accuracy (Uncalibrated) +/-5°C

PUF-based Hardware Root of Trust

• PUF-based Unique ID
• PUF-based True Random Number Generator
• PUF-based Secure Key Storage

PUF-based True Random Number Generator

• Easy adoption in all platforms, from .15um to 7nm
• Ultra-fast initial time / stabilization (ready in m-sec)
• High-speed throughput (over 100Mbits/sec)

LPDDR Controller

• Supports LPDDR protocol standard JESD209B and JESD209A-1 Specification
• Compliant with DFI version 5.0 Specification
• Supports up to 2GB device density

Deep Learning Processor

• Unified deep learning/vision/video architecture enables flexibility
• Low power extends battery life and prevents overheating
• Single scalable architecture

World's most powerful baseband processor

• Designed to meet the demanding requirements of modern 5G networks for extreme multi gigabit, multi carrier and user, and ultra-short latency

USB 3.0 femtoPHY for TSMC 22ULP

• 5 Gbps SuperSpeed data transmission rate through 3 meter USB 3.0 cable
• Integrated PHY includes transmitter, receiver, SSC generation, PLL, digital core, and ESD I/O pads

50mA CMOS buck regulator

• Input voltage range 3.0V – 5.5V.
• Output voltage 1.8V ±5%.
• 89% efficiency at 50mA.

8~13M pixel sensor support High Quality ISP IP

• Image: Up to 13MPixel
• Video: Up to 13MPixel at 60 FPS
• Input formats: Bayer (8bit, 10bit, 12bit), YUV(16bit)

QSGMII/SGMII/1000BASE-X and MAC

• Integrated MAC and PCS for area efficiency
• Fully compatible with IEEE802.3 2015 standard, QSGMII specification 1.2, and SGMII specification 1.6 Standard

250Mbps to 16Gbps Multiprotocol SerDes PMA

• Very wide CDR range -- operates with data rates from 0.25Gbps to 12.7Gbps
• Extremely low jitter suitable for Enterprise SerDes applications

LPDDR4/3/2 DDR4/3/2 ComboPHY

MIPI CSI-2 Tansmitter v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.

• Fully compliant to MIPI standard
• Small footprint
• Code validated with Spyglass