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最新IP
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Multi-Protocol 25G PHY IP for TSMC 7-nm
- Supports 1.25 to 25.8 Gbps data-rate
- Supports PCI Express 4.0 with lane margining, 1G to 100G Ethernet, CCIX, and SATA protocols
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Passive/active NFC transceiver
- TSMC 180 nm 6 metals generic process without analog options
- Differential antenna interfaces with dedicated external capacitors for antenna impedance matching
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MIPI M-PHY G4 Designed For TSMC 28nm HPC+
- Compliant to MIPI Alliance Standard for M-PHY specification Version 4.1
- Supports M-PHY Type-I system
- Support for Clock and Data Recovery Options
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Low Power Voltage and Current Reference Circuit, 0.3% Accuracy, 90 dB PSR in TSMC C130BCD
- TSMC C130BCD process
- No external capacitor required
- Input power supply: 2.5 V to 5 V
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MIPI M-PHY Gr4 IP in TSMC 28HPC+
- Supports high speed data transfer G4 A/B and backward compatible
- Supports 4 reference clocks as per MIPI 4.1 specification
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DDR5/4 Controller
- Supports JEDEC standard DDR5 and DDR4 SDRAMs and DIMMs
- Multiport Arm® AMBA® interface (4 AXI™/3 AXI™) with managed QoS or single-port host interface to the DDR controller
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12-Bit 380MS/s Dual Current Steering DAC
- 40nm SMIC LL Process, 6 Metals Used
- 2.5V and 1.1V Supplies
- Sampling Rate up to 380MS/s
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GNSS RPU (GPS, GLONASS, BeiDou and Galileo)
- Flexible Multi –Constellation Support
- Low Power Consumption
- High Sensitivity
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Chacha20-Poly1305 HP
- Fully compliant with RFC7539
- Supports encryption/decryption only (Chacha20)
- Supports authentication only (Poly1305)
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PCI Express Gen 1/2/3/4 Phy
- TSMC advanced 16 nm FFC CMOS process
- Available in 1X, 4X, 8X, and 16X configuration
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FlexNoC AI Package
- Scales from 10s to 100s of IP blocks
- Automatically generates ring, mesh and torus networks
- View and edit generated topologies
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Neural Inferencing for Edge and Data Center
- modular from 1 to >100 TOPS,
- scalable: as you double the silicon area, you double the throughput in TOPS
热门IP
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1
Low-power 32-bit RISC-V processor
- RISC-V RV32 instruction set:
- Machine mode only
- 32 vectorized interrupts
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2
Deep neural-network accelerator (DNA) AI processor
- Specialized design to take advantage of sparsity in weights and activations for compute and bandwidth reduction
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3
Cyber Secured MIL-STD-1553 FPGA IP
- MIL-STD-1553B market proven FPGA IP Core
- Support standard Bus Controller/ Remote Terminal/ Monitor operation modes
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4
AVB/Automotive Ethernet Switch
- IEEE 802.1AS
- IEEE 802.1Qav
- IEEE 802.1Qat
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5
112Gbps Multi-Rate Long-Reach PAM-4 SerDes
- Available 7nm FinFET CMOS Processes
- 112/56Gbps PAM-4 or 56/28/10Gbps NRZ data rates
- Power-optimized for LR and MR links
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6
CAN-FD controller compatible with both CAN 2.0B and CAN-FD
- Compatible with both CAN 2.0B and CAN-FD
- Fully compliant with ISO 11898-1:2015
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7
Ultra-low-power 12-bit SAR ADC with lowest voltage
- Standard process (no analog option)
- 0.5 V Digital & 0.9 V analog supplies
- 12-bit SAR-based
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8
IPsec Engine
- Can aggregate several 10, 40 or 100 GBE link
- Throughput from 10 Gbps up to 100 Gbps
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9
12-bit High Speed SAR IQ-ADC
- 320MSPS, 0.8V
- TSMC12FFC
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10
Gen-Z 1.0 Controller
- Gen-Z specification 1.0a compliant
- Gen-Z PHY specification 0.9a compliant
- Explicit and P2P Classes support
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11
HEVC + H.264 Codec IP Single Core for 4Kp60
- Frame Buffer Compression
- Low latency tolerance
- Frame based processing
- Smart encoding scheme
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12
2.4 GHz transceiver for Bluetooth Low Energy
- Voltage supply: 1.3V down to 1V, with graceful degradation down to 0.9V
- Compliant with direct operation from 1.2V battery
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