New Silicon IP
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Analog I/O + ESD protection for Die-2-die interfaces
- Analog I/Os
- ESD Power protection
- Ground pads
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Memory Compiler in TSMC(16nm,22nm,28nm,40nm,55nm,90BCD+,110nm,152nm,180BCD)
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HHGrace 0.11um LP Multiple Power Supply IO library
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Zero Additional Mask MTP IP, 2.2-5V 4kbit Towerjazz 180 PM
- Supports high temperature and long retention life time for severe automotive requirement.
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Zero Additional Mask MTP IP, 2.2-5V 4kbit HHGrace 180BCD
- High Temperature Operation
- Large Program Size enables Short Testing Time
- Low Cost
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High ESD analog IO library
- Analog Pads
- Power Pads
- Ground Pads
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ESD solution set for LV & advanced processes
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600MHz General Purpose Clock Multiplier PLL for 180n CMOS
- Wide range N, M, P integer dividers.
- 40MHz – 600MHz output frequency range.
- Compare frequency range 8MHz – 75MHz.
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Zero Additional Mask MTP
- Up to 1kB densities
- Up to 100k P/E cycles
- No additional mask required
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OSC - HHGrace 110nm ULL
- High accuracy and low coefficient of temperature
- High PSRR
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OSC - HHGrace 110nm ULL
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Temperature Sensor - HHGrace 110nm ULL
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