New Silicon IP
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SMBUS & PMBUS Master/Slave controller
- Master operation: Master transmitter, Master receiver
- Slave operation: Slave transmitter, Slave receiver
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Low-power high-speed reconfigurable processor to accelerate AI everywhere.
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UART Core with SDLC Function
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RSA-ECC High-Performance Multi Public Key Engine
- RSA, ECC and more
- > 1 GHz in 16nm
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Network Security Crypto Accelerator
- Scalable architecture & crypto engines for optimal performance/resource usage
- Configurable for perfect application fit
- 100% CPU offload with low latency and high throughput
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DDR Encrypter
- Protect the external memory
- On-the-fly encryption
- Optional authentication
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I2S/TDM Serial Audio Interface with Asynchronous Sample Rate Conversion
- Integrating this unique component will eliminate a discrete component in the bill of materials
- Support for both FPGA and ASIC with seamless transition
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800 Gigabit Ethernet MAC + PCS
- Two 400GBase-R PCS cores with required modifications and glue logic.
- Includes RS-FEC(544,514) KP4 FEC
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TicoXS FIP UHD8K Encoder / Decoder IP-core with JPEG XS and intoPIX Flawless Imaging Profile (FIP) – The newest codec for AV over IP with 100% quality and zero latency !
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