New Silicon IP
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I2S/TDM Serial Audio Interface with Asynchronous Sample Rate Conversion
- Integrating this unique component will eliminate a discrete component in the bill of materials
- Support for both FPGA and ASIC with seamless transition
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800 Gigabit Ethernet MAC + PCS
- Two 400GBase-R PCS cores with required modifications and glue logic.
- Includes RS-FEC(544,514) KP4 FEC
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TicoXS FIP UHD8K Encoder / Decoder IP-core with JPEG XS and intoPIX Flawless Imaging Profile (FIP) – The newest codec for AV over IP with 100% quality and zero latency !
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TicoXS FIP UHD4K Encoder / Decoder IP-core with JPEG XS and Flawless Imaging Profile (FIP)
- Extremely low footprint in FPGA or ASIC (low logic, low memory, low DDR)
- Compliant with JPEG XS High Profile & Flawless Imaging Profile (FIP)
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SM4-GCM Multi-Booster
- ASIC & FPGA
- High throughput
- Guaranteed performance with small packets
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AES-GCM Ultra-Low Latency
- High throughput: 64 GB/s (512 Gbps)
- Ultra-low latency
- Optional CRC support for data integrity
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IrDA Controller
- Rapid prototyping and time-to-market reduction
- Design risk elimination
- Development costs reduction
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I2C Master / Slave Controller with FIFO (AXI & AXI-Lite Bus)
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I2C Bus Master / Slave Controller Interface with FIFO
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Local Interconnect Network (LIN) Soft Controller IP
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Serial Peripheral Interface - Master/Slave with single, dual, quad and octal SPI Bus support
- Operates with 8, 16 and 32 bit CPUs
- Full duplex synchronous serial data transfer
- DMA support
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Security Enclave IP based on RISC-V
- Secure Boot
- Firmware update in the field
- Secure key storage
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