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IrDA Controller

• Rapid prototyping and time-to-market reduction
• Design risk elimination
• Development costs reduction

I2C Master / Slave Controller with FIFO (AXI & AXI-Lite Bus)

I2C Bus Master / Slave Controller Interface with FIFO

Local Interconnect Network (LIN) Soft Controller IP

Serial Peripheral Interface – Master/Slave with single, dual, quad and octal SPI Bus support

Scalable UHD JPEG 2000 Encoder - 8 up to 16 bits per Component Lossy or Numerically Lossless Image / Video Compression

• ISO/IEC 15444-1 Compliant and Standalone Operation
• Advanced JPEG 2000 Implementation
• Easy Implementation and Verification
• Trouble-Free Technology Map and Implementation

Deterministic Random Bit Generator (DRBG)

• NIST 800-90A/B/C compliant
• Health test
• AES-CTR based (CTR_DRBG)

Blockchain Hardware Accelerator

• Wide variety of ECC curves supported (Weierstrass, Edwards, Montgomery, Twisted-Edwards, …)
• Ideal for FPGA/ASIC integration

I2C Bus Interface - Master with FIFO

QSPI FLASH Controller with Execute in place – XIP functionality (SINGLE, DUAL and QUAD SPI Bus Controller with Double Data Rate support)

JPEG dual channel encoder

• Baseline JPEG compliant (ITU T.81), Motion JPEG
• Up to 12 bits depth possible (default: 8 bit)

DO-254 Ready MIL-STD-1553 A/B compliant IP with DDC software API and register compatibility