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New Silicon IP
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Ultra High Density 6-track Standard Cell library - TSMC 65nm 65LP LP / GP / ULP, supports 60/65/70nm channel length
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Thick oxide library - TSMC 55nm 55LP / LP_eF / ULP / ULP_eF / GP
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High Performance & High Density 10 - track Standard Cell library - TSMC 55nm 55LP / LP_eF / ULP / ULP_eF / GP, supports 60/65/70nm channel length
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Ultra High Density 7 - track Standard Cell library - TSMC 55nm 55LP / LP_eF / ULP / ULP_eF / GP, supports 60/65/70nm channel length
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Ultra High Density 6-track Standard Cell library - TSMC 55nm 55LP / LP_eF / ULP / ULP_eF / GP, supports 60/65/70nm channel length
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Thick oxide library - TSMC 40nm 40LP / LP_eF / ULP / ULP_eF / G
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High Performance and High Density 10-track Standard Cell library - TSMC 40nm 40LP / LP_eF / ULP / ULP_eF / G, supports 40/45/50nm channel length
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Ultra High Density and Ultra Low Power 7-track Standard Cell library - TSMC 40nm 40LP / LP_eF / ULP / ULP_eF / G, supports 40/45/50nm channel length
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Ultra High Density 6-track Standard Cell library - TSMC 40nm 40LP / LP_eF / ULP / ULP_eF / G, supports 40/45/50nm channel length
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Thick oxide library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP
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Ultra High Performance 14-track Standard Cell library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP, supports 30/35/40nm channel length
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Ultra High Performance & High Density 12-track Standard Cell library - TSMC 28nm HPC / HPC+ / HPM / HP / HPL / LP / ULP, supports 30/35/40nm channel length
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