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Graphic & Peripheral IP Listing

722 IP Cores (201 - 240)

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10 Gigabit Ethernet XGMAC IP

The 10 Gigabit Ethernet MAC IP is compliant with the Ethernet IEEE 802.3-2008 standard and provides an interface between AHB/AXI Bus and the 10 Gigabit Media Independent Interface (XGMII) using ...

201
1.25 Gbps Four-Channel (4CH) LVDS Serializer with Pre-emphasis

The MXL-LVDS-TX-4CH is a high performance 4-channel LVDS Transmitter implemented using digital CMOS technology. Both the serial and parallel data are organized into four channels. The parallel ...

3 Testimonials
Alan Aronoff, Vice President of Marketing, Key ASIC

202
1.25 Gbps 4-Channel LVDS Deserializer in Samsung 28FDSOI

The 4-Channel LVDS Deserializer is a high performance 4-channel LVDS Receiver implemented using digital CMOS technology. Both the serial and parallel data are organized into four channels. ...

4 Testimonials
Joseph Hong, General Manager, Faraday Technology Corporation

203
3.25 Gigabit SerDes

The MXL-SRDS-3204 is a Quad Gigabit SerDes implemented in digital CMOS technology. Each of the four channels supports data rate up to 3.2Gbps. It is compatible with router-backplane links, PCI ...

204
1.25 Gbps SGMII SerDes

MXL-SRDS-SGMII is a Serial Gigabit Media Independent Interface SerDes implemented in digital CMOS technology. The SerDes IP offers data transfer rate of 1.25Gbps, for both upstream & downstream ...

205
UART with FIFOs, IrDA, and Synchronous CPU Interface Core

The H16750S is a standard UART providing 100% software compatibility with the popular Texas Instruments 16750 device. It performs serial-to-parallel conversion on data originating from modems ...

206
UART/IrDA controller with APB interface

AMBA 2.0 APB bus support ; High-Speed NS 16C550A-Compatible UART ; IrDA 1.3 SIR with up to 115.2 Kbps data rate ; SIR pulse width is programmable as 1.6 us or a 3/16 of baud-rate pulse width ; ...

207
IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes

Certus Semiconductor has a long history of working across a broad range of technology nodes from 180nm down to the latest FinFet offerings. Our I/O solutions include 1.8V & 3.3V GPIO, I2C, ...

208
Serial Peripheral Interconnect Master & Slave Interface Controller

The SPI-MS core from Alma Technologies implements a Serial Peripheral Interconnect interface controller, which can operate either as a Master or a Slave. The Serial Peripheral Interface (SPI) ...

209
Camera sub-LVDS/mini-LVDS/LVDS/HiSPi(SLVS-400, HiVCM)/MIPI-DPHY/CMOS 6-7mode Combo-Receiver 1.5Gbps

The CL12684KM4-8-12-16R3AM6-7ZIP is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System. The CL12684KM4-8-12-16R3AM6-7ZIP is designed to support data rate in excess ...

210
Configurable UART with FIFO

The D16550 is a soft Core of Universal Asynchronous Receiver/Transmitter (UART), functionally identical to the TL16C550A. It allows serial transmission in two modes – UART and FIFO. In the ...

5 Testimonials
Mike Slutsky, Advanced Development, Zebra Technologies Corporation

211
Configurable UART with FIFO and hardware flow control

The D16750 is a soft Core of a Universal Asynchronous Receiver / Transmitter (UART), functionally identical to the TL16C750. The D16750 allows serial transmission in two modes - UART and FIFO. ...

5 Testimonials
Tony Moore, R&D , Siemens Industry Inc.

212
Configurable UART

The D16450 is a soft core of the Universal Asynchronous Receiver/Transmitter (UART), functionally identical to the TL16C450. It performs serial-to-parallel conversion on data characters received ...

5 Testimonials
Tony Moore, R&D , Siemens Industry Inc.

213
Expanded UART with FIFO, hard and soft flow control, synchronous mode

The D16950 is a soft core of a Universal Asynchronous Receiver/Transmitter (UART), functionally identical to the OX16C950. It allows serial transmission in two modes: UART and FIFO. In the ...

5 Testimonials
Mike Slutsky, Advanced Development, Zebra Technologies Corporation

214
Differential CML 50 Ohm terminated output Buffer for up to 12Gb/s (GF N65)

The PMCC_OBUF12G is a differential CML 50Ω terminated output driver for datarates from DC up to 12Gb/s. The buffer can also be used for up to 8GHz clock driving. Depending on input signal ...

215
Tiny UART

Small is beautiful... The DμART is one of the tiniest UART IP Cores available on the market.The DμART is a soft core of a Universal Asynchronous Receiver/Transmitter (UART). It performs ...

5 Testimonials
Mike Slutsky, Advanced Development, Zebra Technologies Corporation

216
Configurable UART with FIFO, hardware and software flow control

The D16752 is a universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs and automatic hardware/software flow control. It offers enhanced features, like transmission control register ...

5 Testimonials
Josef Börcsök, Prof. Dr -Ing. habil. , Universität Kassel

217
UART with SDLC Function

The D85C30 - (Serial Communication Controller) is a dual channel USART (Universal Synchro-nous/Asynchronous Receiver/Transmitter) device designed for use with 8 and 16-bit microproces-sors. ...

218
Standard SPI Single Master

The Standard SPI Single Master is a single master controller and uses a message queue based architecture. A message consists of the command, transmit data and receive data field. The command ...

219
Dual Channel UART with Scalable Rx-FIFO

Universal asynchronous receiver and transmitter using the RS232 protocol are often used to connect peripheral devices to a central controller. The DUARTmodule has two receive and two transmit ...

220
Universal Asynchronous Receiver/Transmitter Core

Programmable automated RTS and CTS generation ; In automated CTS mode, CTS controls transmitter ; In automated RTS mode, receive FIFO contents and threshold control RTS ; Fully backward compatible ...

221
Synchronous Data Link Controller

CoreSDLC provides a high-speed synchronous serial communication controller that utilizes the synchronous data link control (SDLC) protocol. Operation of the CoreSDLC controller is similar ...

222
Universal Asynchronous Receiver / Transmitter

Description: Universal Asynchronous Receiver/Transmitter (UART) Core16550 is a UART with or without FIFO support used for asynchronous communication. It is 100% software compatible ...

223
Serial Peripheral Interface

CoreSPI implements SPI and can operate as either a Master or a Slave. When operating in Master mode, the core generates the serial data clock (m_sck) and selects the Slave device that will be ...

224
SDI Video Interface

225
Asynchronous Communications Interface Adapter (ACIA)

The following information applies to both the Chip and Core versions of this 65xx brand microprocessor family member. WDC's high volume production proven 65xx brand microprocessor family ...

226
XPS UART Lite

The XPS Universal Asynchronous Receiver Transmitter (UART) Lite Interface connects to the PLB (Processor Local Bus) and provides the controller interface for asynchronous serial data transfer. ...

227
LVDS Transmitter 1250Mb/s, 800Mhz clock with RSDS support

V-Trans 's LVDS technology solutions eliminate the trade-offs in speed, low power, low noise (EMI), and BOM cost saving for high performance data transmission applications. This LVDS transmitter ...

228
LVDS serdes 28:4 channel compression TX 20-170Mhz

LVDS serdes 28:4 channel compression TX 140-1190 Mbs x4 FPD-LINK Transmitter 24-bit color 20-170Mhz This FPD Link Transmitter Macro is based on National Semiconductor openLDI specification ...

229
LVDS serdes 4:28 channel decompression RX 8-150Mhz

FPD-LINK 24-bit color, 8-150Mhz Receiver LVDS serdes 4:28 channel decompression RX 56-1050 Mbs x4 V-Trans 's FPD Link Receiver Macro is based on National Semiconductor openLDI specification ...

230
LCD Host LVDS Interface, Dual Pixel 20-112Mhz (SVGA/QXGA)

V-Trans 's LVDS Display interface IP is based on National Semiconductor openLDI specification v0.95 dated May 13th 1999 that allow the transfer of digital display data between a display source ...

231
Async/Clocked Serial Channel

Full-featured Async/Clocked Serial channel

232
Dual RSDS Transmitter, 24/18-bit color, 40-300Mb/s (SVGA/UXGA/full HDTV) LCD & Plasma display

This RSDS Transmitter interface IP is based on RSDS “Intra-Panel” Interface Specification rev1.0, dated May 2003 that allow the transfer of digital display data between a Timing Control ...

233
三速串行数字接口(SDI)物理层(PHY) IP核

串行数字接口(SDI)是广播电视台和视频摄制中最流行的原始视频连接标准。高速串行输入/输出和通用可编程逻辑使得FPGA（现场可编程门阵列）成为获取、混合、存储、编辑、处理和格式...

234
Dual RSDS Transmitter, 30-bit color, 40-300Mb/s (SVGA/UXGA/full HDTV) LCD & Plasma display

This RSDS Transmitter interface IP is based on RSDS “Intra-Panel” Interface Specification rev1.0, dated May 2003 that allow the transfer of digital display data between a Timing Control ...

235
Dual RSDS Transmitter, 30-bit color, 80-400Mb/s (SVGA/Full HDTV@120Hz)

This RSDS Transmitter interface IP is based on RSDS “Intra-Panel” Interface Specification rev1.0, dated May 2003 that allow the transfer of digital display data between a Timing Control ...

236
Dual FPD-link, 30-Bits Color LVDS Receiver, 170Mhz (SVGA/FHD@120Hz) LVDS de-serializer 10:70 channel decompression with automatic de-skew

V-Trans ‘s FPD Link Receiver Macro is based on National Semiconductor openLDI specification v0.95 dated May 13th 1999 that allow the transfer of digital display data between a display source ...

237
AXI UART16550

The AXI Universal Asynchronous Receiver Transmitter (UART) 16550 connects to the AMBA® (Advance Microcontroller Bus Architecture) AXI (Advanced eXtensible Interface) and provides the controller ...

238
AXI UART Lite

The LogiCORE™ IP AXI Universal Asynchronous Receiver Transmitter (UART) Lite interface connects to the Advanced Microcontroller Bus Architecture (AMBA®) specification’s Advanced eXtensible ...

239
SDI II Next Generation SDI Video Interface

240

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