FPD-LINK 24-bit color, 8-150Mhz Receiver
LVDS serdes 4:28 channel decompression RX 56-1050 Mbs x4
V-Trans 's FPD Link Receiver Macro is based on National Semiconductor openLDI specification v0.95 dated May 13th 1999 that allow the transfer of digital display data between a display source and a display device.
This receiver converts 4 LVDS, (low voltage differential signaling) data streams, into 24bits (single pixel) CMOS data plus 4 control signals (VSYNC, HSYNC, DE, and 1 user-defined signals), 28-bit CMOS .total.
At a maximum pixel rate of 150Mhz, LVDS data line speed is 1050Mbps, providing a total maximumbandwidth of 4.2Gb/s (525Mbytes per second).