You are here:
DisplayPort Tx PHY & Controller - GF22FDX
The Innosilicon eDP DP PHY is a highly reliable solution for your display interface requirements. It is fully compliant with DP 1.4 and eDP 1.4 standards, and capable of driving 2.7Gb/s per lane in configurations up to 4 lanes.
It is configurable via its I2C, APB or CPU interface, and production testing is simplified through at-speed BIST, scan, loopback modes and boundary scan.
The PHY itself is fully self-contained, requiring no end user synthesis, and is optimized for both area and power. It contains all the necessary PHY components such as I/Os, primary and secondary ESD, PLL and the data symbol Synchronization/Serialization unit.
It is configurable via its I2C, APB or CPU interface, and production testing is simplified through at-speed BIST, scan, loopback modes and boundary scan.
The PHY itself is fully self-contained, requiring no end user synthesis, and is optimized for both area and power. It contains all the necessary PHY components such as I/Os, primary and secondary ESD, PLL and the data symbol Synchronization/Serialization unit.
查看 DisplayPort Tx PHY & Controller - GF22FDX 详细介绍：
- 查看 DisplayPort Tx PHY & Controller - GF22FDX 完整数据手册
- 联系 DisplayPort Tx PHY & Controller - GF22FDX 供应商
Block Diagram of the DisplayPort Tx PHY & Controller - GF22FDX
4Lanes IP
- MIPI D-PHY 1.5Gbps (4-lanes TX/RX, PLL Integrated) TSMC 28HPM
- MIPI D-PHY 1.5Gbps (4-lanes RX) TSMC 28HPC
- MIPI D-PHY 1.5Gbps (4-lanes TX, PLL Integrated) TSMC 28HPC
- MIPI D-PHY 1.5Gbps (4-lanes RX) TSMC 28HPM
- MIPI D-PHY 1.5Gbps (4-lanes TX, PLL Integrated) TSMC 28HPM
- MIPI D-PHY 1.5Gbps (4-lanes RX) TSMC 28LP