PCI Express PHY serial link PIPE Transceiver IP cell/hard macro
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Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
Data rates for the DisplayPort transmitter PHY version 1.4 range from 1.62Gbps (RBR) to 5.4Gbps (HBR2). Integrated 100-ohm termination resistors, a built-in equalizer with configurable analogue features, and common-mode biassing Terminator resistance, BGR voltage, regulator voltage, and CDR bandwidth Support 1.8V/0.9V power supplies for internal analogue signal monitoring and PLL testing.
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Block Diagram of the Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
Display Port1.4 Rx IP IP
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