XAUI Transciever

The Silicon Creations 4-lane 1.0Gbps to 3.125Gbps Multi-Rate Serializer/Deserializer) macro includes all high-speed analog functions for 1 to 4 lanes of bi-directional data transport between chips over FR4 and similar PCBs and backplanes. The SerDes is optimized for low power operation with highly programmable line driver and line receiver. 20b input and output datapaths simplify design of link layers created from RTL using regular standard cells and regular synthesis, place, and route ows. Built-in BIST blocks enable stand-alone at-speed self-testing. Excellent supply noise immunity in the CDR and TX PLLs makes the SerDes ideal for use in noisy mixed signal SoC environments.

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