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Wireline Communication
Error Correction/Detection
Forward Error Correction
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Forward Error Correction IP Core

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Forward Error Correction IP Listing

82 IP Cores (41 - 80)

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HDMI 2.1 Forward Error Correction (FEC) Receiver

The HDMI Forward Error Correction (FEC) Receiver IP Core implements Reed-Solomon FEC and symbol de-interleaving/de-mapping as specified by the HDMI 2.1 specification. Forward Error Correction ...

41
HDMI 2.1 Forward Error Correction (FEC) Transmitter

The HDMI Forward Error Correction (FEC) Transmitter IP Core implements Reed-Solomon FEC and symbol mapping/interleaving as specified by the HDMI 2.1 specification. Forward Error Correction ...

42
VESA DisplayPort 1.4 TX IP Subsystem for Xilinx FPGAs

Complete DisplayPort™ 1.4 Transmitter solution with support for VESA Display Stream Compression (DSC) ; Fully compliant with the DisplayPort 1.4a Standard ; Including the DSC slices per ...

43
VESA DisplayPort 1.4 RX IP Subsystem for Xilinx FPGAs

Complete DisplayPort™ 1.4 Receiver solution with support for VESA Display Stream Compression (DSC) ; Fully compliant with the DisplayPort 1.4a Standard ; Including the DSC slices per line ...

44
1Gbit/s LDPC Decoder and Encoder (WiMedia UWB)

The WiMedia 1.5 LDPC Decoder IP supports all LDPC coding schemes as defined by the standard. The WiMedia UWB standard was developed by the WiMedia Alliance. Version 1.5 of the standard introduces ...

45
GMR Release 2 and GMR Release 3 LDPC Decoder

GEO-Mobile Radio (GMR) is an ETSI standard for satellite phones. The Creonic GMR Decoder IP core supports the PNB2 burst packets that were added in GMR Release 2 (GMPRS-1) and use LDPC codes ...

46
IEEE 802.15.3c (60 GHz PHY) Multi-Gbit/s LDPC Decoder

The Creonic IEEE 802.15.3c LDPC Decoder IP Core supports all LDPC codes with a codeword size of 672 bits as defined by the standard. The IEEE 802.15 working group specifies standards targeting ...

47
DVB-C2 Receiver (including LDPC and BCH decoder)

The DVB-C2 Receiver IP Core integrates the forward error correction as defined by the standard (including LDPC and BCH decoder). DVB-C2 (Digital Video Broadcast - Cable 2nd Generation) ...

48
Generic Polar FEC Codec

Creonic has flexible Polar decoder architecture to fulfil different customer requirements. The IP core has been demonstrated on internal conferences and shows. An FPGA demonstrator is available ...

49
CCSDS SCCC Turbo Encoder and Decoder

The recommended CCSDS 131.2-B-1 standard introduces a Serial Concatenated Convolutional Code (SCCC). Main goal of this code is to allow an efficient use of available bandwidth, by allowing to ...

50
AR4JA LDPC Decoder

AR4JA LDPC decoder is a configurable design that allows runtime configuration for decoding different code rates (i.e., 1/2, 2/3 and 3/4). To obtain high throughput, two different levels of parallelism ...

51
CTC decoder - Convolutional Turbo Code decoder for 3GPP (WCDMA)

K=4 (8 states). ; Rate 1/3, other rates can be achieved with external puncturing. ; Sophisticated early termination mechanism to support power saving and higher statistical throughput. ; Compliant ...

52
IEEE 802.16e LDPC decoder

Support all codes defined in the standard: 1/2, 2/3A, 2/3B, 3/4A, 3/4B, 5/6. ; Support all 19 codes lengths, from 576 to 2304 bits. ; Programmable number of iterations. ; Internal convergence ...

53
Rate-1/3 fast Viterbi decoder

Constraint length = 7, rate = 1/3 (default: G0=oct"133", G1=oct"165", G2=oct"171") ; Capable of punctured coding ; 3-bit soft inputs ; Burst and continuous modes ; High speed design, above 200 ...

54
IEEE 802.3an/bz LDPC Encoder-Decoder

The recently published IEEE 802.3an/bz standard describes the 10GBASE-T application for operation over category 6/class E (~50 meter), augmented category 6/class E, and class F twisted-pair ...

55
Configurable Reed Solomon Encoder/Decoder for GF(256) Product Family - supporting Erasue / Error decoding , streaming / burst up to 40gbps

Amethyst provides a novel architecture of RS CODEC targeted for various communication standards. The cores under RSFAMILY support different architecture offering optimization for different ...

56
Configurable Streaming Reed Solomon Encoder/Decoder for GF(256)

Amethyst's reed solomon CODEC was selected by Amethyst's SoC customers for having the minimal HW resources. The decoder and encoder is silicon proven and was verified to meet the theoretical ...

57
CMMB LDPC decoder

China Multimedia Mobile Broadcasting (CMMB) LDPC decoder, implemented with Continuous bits’ innovative LDPC-decoder architecture. The implementation provides high data-rates, low power consumption, ...

58
3GPP LTE TCC decoder

Rate 1/3, other rates can be achieved with external puncturing. ; Implements the 3GPP Long Term Evolution (LTE) specification. ; Core contains the full 3GPP LTE interleaver. ; All 188 3GPP LTE ...

59
3GPP LTE TCC encoder

Rate 1/3, other rates can be achieved with external puncturing. ; Implements the 3GPP LTE specification. ; Core contains the full 3GPP LTE interleaver. ; All 188 3GPP LTE block sizes (40 - 6144) ...

60
802.11n (MIMO WLAN) LDPC decoder / encoder

Code length: 648, 1296, 1944. ; Code rates: 1/2, 2/3, 3/4, 5/6 (for each code length). ; Programmable number of iterations. ; Internal convergence test stops the decoder when data is fully recovered ...

61
DVB-S2 LDPC decoder

Supports CCM, VCM, ACM modes. ; Supports 64Kbit and 16Kbit frames. ; 0.1dB to 0.5dB coding gain improvement versus the standard reference. ; Frame by frame programmability of code rate, modulation, ...

62
China Multimedia Mobile Broadcasting (CMMB) LDPC decoder

Compliant with CMMB specifications, block size of 9216 bits, code rates 1/2 and 3/4. ; Frame by frame programmability of code rate and number of iterations. ; Syndrome based LDPC iteration stopping ...

63
tail-biting Viterbi decoder (rate 1/5) for 802.16m

K=7 (64 states) G1=171(octal), G2=133(octal), G3=165(octal), G4=117(octal), G5=127(octal). ; Rate 1/5. Other rates can be supplied by external puncturing. ; Support WiMAX rate 1/2 and LTE rate ...

64
512B/ECC16 Nand Flash BCH Encoder/Decoder

The BCH encoder/decoder provides error correction code (ECC) capabilities for applications such as data storage and transmission. BCH is optimal for applications where errors are non-correlated ...

65
Soft Decision FEC Encoder/Decoder for 100G Optical

ViaSat’s ECC66100 is a family of soft decision Forward Error Correction (FEC) IP cores based on turbo product code (TPC) designed for use in 100 Gbps communications applications. TPCs are ...

66
Dual mode WiMAX/LTE turbo decoder

Implements the WiMAX IEEE802.16e/m and 3GPP Long Term Evolution (LTE) specifications.

67
1KB/ECC96 NAND Flash BCH Encoder/Decoder

The BCH encoder/decoder provides error correction code (ECC) capabilities for applications such as data storage and transmission. BCH is optimal for applications where errors are non-correlated ...

68
LDPC decoder for 802.11ac/n standards

The IEEE 802.11n/ac/ax LDPC Decoder Core performs iterative decoding of channel data that has been encoded as described in the IEEE Std 802.11n/ac/ax standard.

69
IEEE802.3bj RS-FEC Decoder for 100Gb/s Application

The RS-FEC Decoder IP is a highly optimized Reed Solomon Decoder solution designed for the IEEE 802.3bj standard. The Reed Solomon codeword can be fed partially parallelized to the Decoder ...

70
Complete FEC Encoder Solution compliant to LTE/ LTE A Specification

The 3GPP LTE FEC Encoder IP Core addresses the implementation of the FEC building blocks compliant to 3GPP TS 36.212 V 10.5.0. Specifically, the IP core offers an efficient, easy to customize ...

71
LDPC Decoder and Encoder that supports DVB-S2 DVB-S2X DVB-T2 DVB-C2 CMMB DMB-T

LDPC decoder and encoder that supports several standards: ; DVB-S2 ; DVB-T2 ; DVB-C2 ; CMMB ; DMB-T (GB20600-2006) ; Proprietary H-matrices ; ; Versions available for different ...

72
High bit rate Turbo Decoder core for 3GPP LTE/ LTE A

The 3GPP LTE Turbo Decoder IP Core V1.0 addresses the decoder implementation for the turbo coded transport channel compliant to 3GPP TS 36.212 V 10.5.0. The Turbo Decoder IP is a highly parallel ...

73
2D FEC

74
EFEC20

75
EFEC7

76
Soft Decision FEC for 200G Optical

ViaSat 66200 SDFEC (Soft Decision Forward Error Correction) is a family of turbo product code (TPC) designed for use in 200 Gbps communications applications. The multi rate SDFEC handles BPSK, ...

77
10G/40G RS(255,239) Encoder/Decoder for ITU G.709

The IPrium-10G-G.709-Codec IP Core implements the error-correcting coding Reed-Solomon (255, 239) for the ITU-T G.709 recommendation. Supports synchronous and burst mode. Optimised for use with ...

1 080.00€

78
DVB-S2X Compliant LDPC/BCH Decoder IP Core

The AHA4709D LDPC/BCH forward error correction (FEC) decoder core supports all codes, frame sizes, and interleave schemes set forth in the DVB-S2X specifications for broadcast, interactive, ...

79
DVB-S2X Compliant LLR Demapper IP Core

The AHA4709L LLR Demapper core is compliant with section 5.4* (see Note 1) of the Digital Video Broadcast S2-Extention (DVB-S2X) standard. By default, this core uses re-labeled constellation ...

80

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