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Phy IP Listing

2987 IP Cores (2641 - 2680)

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MACsec Engine, 1G to 50G Single-Port, with TSN support

The MACsec-IP-161 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line rate. It provides classification, transformation ...

2641
10G to 100G High Speed Ethernet Controller MAC/PCS/FEC

Up to 100G bandwidth solution for one Ethernet channel Cadence High Speed Ethernet Controller IP supports single channel Ethernet applications for high-performance computing (HPC), networking, ...

2642
Turnkey eNB-IoT Release 15 & multi-constellation GNSS IP solution for IoT devices

CEVA has designed a complete eNB-IoT IP solution that can serve a wide range of applications. The CEVA-Dragonfly NB2 pre-integrates together a CEVA-BX1 processor, an o...

2643
5G Baseband Platform IP for Mobile Broadband and IoT

PentaG2™ is Ceva’s second generation 5G NR baseband modem IP platform. It is the industry’s only platform offering capable of meeting the extreme performance, low latency and strict power ...

2644
GLink CXS-Bridge

GLink (GLink-fs 2.x + PCS-replay) CXS-Bridge is a digital IP to interconnect between two dies that use Glink as a physical layer and provides AMBA CXS issue-B compliant user interface bridge ...

2645
TSMC CLN12FFC Lane-based 1.5 - 16 Gbps Enterprise Multi-Standard SerDes

The GUC's EMS-PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include PCIe Gen1-Gen4,SAS-3 G1-G4, SATA-3 G1-G3 and analogous standards. The receiver ...

2646
TSMC CLN28HPC+ Derivative IP of IGASERT06A Enterprise Multi-Standard SerDes

The GUC's Quad-Lane EMS-XT PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include CEI-28G-VSR, CEI-25G-LR, 100GBase-KR4 (IEEE 802.3bj), CPRI, ...

2647
TSMC CLN7FF Lane-based 1.5 – 22.5 Gbps Enterprise Multi-Standard SerDes

The GUC's EMS-PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include PCIe Gen1-Gen4, SAS-4 G1-G5 and analogous standards. The receiver equalizes ...

2648
4-/8-bit mixed-precision NPU IP

OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solution or independent IP. They are tightly combined ...

2649
1.2V/1.8V Capable General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2650
1.2V/2.5V Tolerant Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2651
1.2V/1.8V/2.5V Capable Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2652
Programmable DLL, fully digital DLL - TSMC 4nm 4FF/4P

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2653
Process Voltage Temperature monitor -TSMC 4nm 4FF/4P

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2654
1.2V/1.8V I2C (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2655
1.2V/3.3V I2C (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2656
LPDDR5 I/O - TSMC 4nm 4FF/4P

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2657
Supporting ONFI 5.0, 4.2, 4.1, 4.0 and ONFI 3 - TSMC 4nm 4FF/4P

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2658
1.8V Secondary Oxide LVDS combo pad - TSMC 4nm 4FF/4P

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2659
Oscillator (1-50)MHz (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2660
1.8V Tolerant Fail-Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 6nm 6FF

Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, Xaui Ethernet, SPI4.2 and more.

2661
2.5V LVDS/LVPECL combo pad - TSMC 0.13um LV,LVOD

Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully compliant with the DFI 3.1 specification, and features ...

2662
I2C Slave with APB Master Bridge (I2C2APB)

The DB-I2C-S-APB-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & control registers (and thus no local host ...

2663
I2C Slave with AXI Master Bridge (I2C2AXI4)

The DB-I2C-S-AXI-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & control registers (and thus no local host ...

2664
I2C Slave with AHB Master Bridge (I2C2AHB)

The DB-I2C-S-AHB-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & control registers (and thus no local host ...

2665
1.5G MIPI D-PHY in SMIC 130nm~28nm

The ACTT family of interface IP for MIPI protocols is leading the way with mobile-optimized low power and high performance. Compliant with the specification for MIPI D-PHY rev1.1 with speeds ...

2666
2.5G MIPI D-PHY in HLMC 28nm

The ACTT family of interface IP for MIPI protocols is leading the way with mobile-optimized low power and high performance. Compliant with the specification for MIPI D-PHY rev1.2 with speeds ...

2667
2.5G MIPI D-PHY in TSMC 22nm

The ACTT family of interface IP for MIPI protocols is leading the way with mobile-optimized low power and high performance. Compliant with the specification for MIPI D-PHY rev1.2 with speeds ...

2668
16G SerDes in 28nm

The Actt's 16G SerDes IP is a high performance Multi-lane SerDes PHY IP designed for chips that perform high bandwidth data communication while operating at low power consumption. This IP is ...

2669
ARINC664 End System IP Core

ARINC664 End System IP is an IP Core that implements ARINC664 part 7 and provides interface between aircraft LRUs and ARINC664 network. As an implementation of End System, IP sends the user's ...

2670
MIPI I3C Basic v1.1.1 specifications with Host Controller Interface v1.1 specification

The I3C (Improved Inter-Integrated Circuit) is the successor of the I2C bus. Keeping the best assets from its elder brother, the I3C has major improvements in use and power, and performance. ...

2671
PCIe Gen5/4 Retimer

Retimer that are Physical Layer protocol aware and that interoperate with any pair of Components with any compliant channel on each side of the Retimer. An important capability of a Physical ...

2672
DisplayPort Transmitter & Receiver

Logic Fruit Technologies has designed & implemented DISPLAY PORT Transmitter & Receiver IP Cores supporting multiple line rates up to 8.1Gbps. The IP cores have been developed as per Display ...

2673
MIPI CSI-2 v3.0 TRANSMITTER FOR COMBO C/DPHY

Compliant with MIPI CSI Standard v3.x, v2.x, v1.x and MIPI D-PHY Standard v1.x, MIPI D-PHY Standard V2.x and MIPI C- PHY V1.x ; Up to 3 Gsps per trio using C-PHY. 17Gbps in 3 Trios. ; Up to ...

2674
UHS II

UHS-II is Ultra High speed type II controller for high speed transfers used in SD application for High definition contents. Key factors includes reusability of legacy resources, low voltage ...

2675
BLE 5.2 Wireless Baseband IP

The LP-BLE is a power and area-optimized Bluetooth Low Energy Controller designed to bring secure wireless connectivity to various ultra-low-power and battery free connected IoT devices, including ...

2676
IEEE 802.15.4 Wireless Baseband IP

The LP-802.15.4 is a power and area-optimized implementation of the IEEE 802.15.4 physical and medium access control layers. It is designed to bring secure wireless connectivity to various ...

Evaluation Platform Available

2677
Bluetooth Dual Mode Wireless Baseband IP

The LP-Bluetooth 5.2 is a power and area-optimized Bluetooth Low Energy and BR-EDR Controllers designed to bring secure wireless connectivity to various low-power connected IoT devices, including ...

Evaluation Platform Available

2678
BLE and 802.15.4 Wireless Baseband IP

This is a power and area-optimized implementation of the Bluetooth Low Energy Controller and the IEEE 802.15.4 physical and medium access control layers. It is designed to bring secure wireless ...

2679
10G TSN Switch

Deterministic Ethernet solutions, like TSN, deliver streams with guaranteed bandwidth and deterministic latency. Time Sensitive Networking (TSN) is the name of the IEEE 802.1 Task Group responsible ...

2680

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