NVM OTP NeoBit in Maxchip (180nm, 160nm, 150nm, 110nm, 90nm, 80nm)
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MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6
The MXL-CDPHY-6p0G-CSI-2-RX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for D-PHY v2.5 and C-PHY v2.0. The PHY can be configured as a MIPI Slave supporting camera interface CSI-2. The PHY supports mobile, IoT, virtual reality, and automotive applications. The CSI-2 RX+ is a Mixel proprietary configuration that is optimized to support full-speed production and in-system testing while minimizing area and leakage power
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Block Diagram of the MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6
DPHY IP
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- Globalfoundries 12nm MIPI D-PHY V1.2@2.5GHz
- MIPI D-PHY Universal IP in TSMC 22ULP
- MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5