Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with low latency
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PCIe Gen5/4 Retimer
Retimer that are Physical Layer protocol aware and that interoperate with any pair of Components with any compliant channel on each side of the Retimer. An important capability of a Physical Layer protocol aware Retimer is to execute the Phase 2/3 of the equalization procedure in each direction. A maximum of two Retimers are permitted between an Upstream and a Downstream Port.
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Block Diagram of the PCIe Gen5/4 Retimer
![PCIe Gen5/4 Retimer Block Diagam](http://www.design-reuse.com/sip/blockdiagram/50328/20220111122232-main-Retimer-Block-diagram.jpg)