The HMAC hardware module allows performing NIST HMAC algorithms as standardized in the FIPS 198-1. The module is coupled with one of the NIST standard secure hash algorithm, SHA-1, SHA-256, ...

The HMAC-SHA2-DPA-FIA IP core belongs to the FortiMac product family. Like all the FortiMac product family members, this IP provides ultra-strong protection against SCA and FIA using a very ...

The FortiMac library belongs to the FortiMac product family. This software library provides ultra-strong protection against SCA, FIA, and cache attacks. This is the only pure SW solution ...

Chevin Technology’s HMAC-SHA256 cryptographic accelerator function is used to securely generate and verify message authentication codes. Message authentication is increasingly required by ...

With a flexible wrapper supporting a wide selection of programmable hashing modes (SHA-1, SHA-224, SHA-256, SHA-384, SHA-512 and MD-5) and several options of data interface, the Hash crypto ...

The Software HMAC-SHA is a secure cryptographic library including SHA-1, SHA-2 and HMAC-SHA-256 implementations.

The DSHA2-256 is a universal solution which efficiently accelerates SHA2-256 hash function compliant with FIPS PUB 180-4. It computes message digest in either 256 or 224 bit modes. Allowed input ...

The EIP-59 is the IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) ...

The EIP-57 is the IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 (FIPS-202), supporting the NIST MAC ...

The EIP-116 High-bandwidth Digital Content Protection Control Path module provides the required technology for implementing all the secure access, cryptographic computations and cipher engine ...

The EIP-120 is a low-power low-gatecount crypto core with DMA capability and local key storage. Compared to a software only solution, the core provides higher performances and additional security ...

Rambus DPA Resistant HMAC-SHA-2 Cryptographic Accelerator Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. HMAC-SHA-2 ...

The DSHA2-384 - a universal solution that accelerates SHA2-384 hash with HMAC mode. DSHA2-384 bridge to APB, AHB, AXI bus, it is a universal solution that efficiently accelerates SHA2-384 ...

Secure-IC offers a broad range of Cryptography technologies with a Tri-Dimensional trade-off of speed vs area vs security to cover customers needs, from Symmetric Cryptography to Asymmetric ...

The Secure Hash Algorithm (SHA) is a family of cryptographic hash function. This family includes SHA-0, SHA-1, SHA-2 and SHA-3. The SHA IP is focused on SHA-1 and SHA-2 algorithms. Although ...

Xiphera’s nQrux® Crypto Module IP core provides a comprehensive security platform that allows for customisation of top-notch cryptographic services, suitable for both microcontrollers and ...

Available SafeZone FIPS 140-2 Level 1 validate cryptography module. FIPS 140-2 Level 1 is the highest certifi cation available for a software module.

有效加速符合FIPS PUB 180-4的SHA2-512哈希函数的通用解决方案是连接APB、AHB和AXI总线的SHA2-512Bridge。它以四种不同的比特模式计算消息摘要：256、224、384或512。可以输入高达...

The SHA-2 IP from Xiphera is a versatile Intellectual Property (IP) core designed for SHA-256 cryptographic hash function with extended support for HMAC message authentication code and HKDF ...

The SHA-2 IP from Xiphera is a versatile Intellectual Property (IP) core designed for SHA-256 and SHA-512 cryptographic hash functions with extended support for HMAC message authentication code ...

The SHA-2 IP from Xiphera is a versatile Intellectual Property (IP) core designed for SHA-384 cryptographic hash function with extended support for HMAC message authentication code and HKDF ...

The SHA-2 IP from Xiphera is a versatile Intellectual Property (IP) core designed for SHA-512 cryptographic hash function with extended support for HMAC message authentication code and HKDF ...

Rambus DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. Whirlpool DPA resistant cryptographic ...

Rambus RT-630 信任根 (原CryptoManager RT-630) 是一种完全可编程的硬件安全内核，为云、AI/ML及通用半导体应用提供security-by-design的安全保证方法。它采用一流的防篡改和安全...

FPGAs (现场可编程门阵列)广泛用于国防、电信、汽车和AI/ML (人工智能/机器学习)等行业中。由于其可重置性和灵活性，不管是作为航空电子和航天器系统、还是控制ADAS (高级驾驶辅助...

Rambus RT-640 信任根(原CryptoManager RT-640) 是一种完全可编程的硬件安全内核，符合ISO-26262 ASIL-B标准，为汽车应用提Security by design的安全保证方法。它采用一流的防篡改...

1 Testimonial
Hweihn Chung, CTO, NextChip

Rambus RT-645 信任根(原CryptoManager RT-645)是一种完全可编程的硬件安全内核，达到ISO-26262 ASIL-D标准，为汽车应用提供security by design的安全保证方法。它采用一流的防篡...

加解密协处理器是一个硬件 IP 核平台，可提高在 FPGA 或ASIC片上系统（SoC）环境中的加解密操作速度。 对称加解密算法可以很高效地迁移到该IP核上来实现，碎片化内存数据可以...

加解密协处理器是一个硬件 IP 核平台，可提高在 FPGA 或ASIC片上系统（SoC）环境中的加解密操作速度。 对称加解密算法可以很高效地迁移到该IP核上来实现，碎片化内存数据可以...

加解密协处理器是一个硬件 IP 核平台，可提高在 FPGA 或ASIC片上系统（SoC）环境中的加解密操作速度。 对称加解密算法可以很高效地迁移到该IP核上来实现，碎片化内存数据可以...

Core implements the IPsec and SSL/TLS security standard at high data rates that require the cryptographic processing acceleration. The ISP1-128 core is tuned for applications with the data rates ...

The SHA cores provide implementation of cryptographic hashes SHA-1 (core SHA1), SHA-2 (cores SHA2-256 and SHA2-512). The cores utilize “flow-through” design that can be easily included ...

The Wi-Fi™ Protected Access 3 WPA3™ is a set of mandatory features to support for Wireless Local Area Network from the IEEE 802.11 set of specifications. It is designed to strengthen the ...

Helion have available a number of solutions which implement the SHA-1 algorithm; we consider the "Fast" version here, which is aimed at applications requiring data throughputs up to the 1 - ...

Implements the SHA-1 secure hash algorithm to NIST FIPS Publication 180-1 ; Fast operation - each 512-bit block requires 81 master clock cycles (1 clock per algorithm step + 1 clock load) ; ...

Helion have available a number of solutions which implement the MD5 algorithm; we consider the "Fast" version here, which is aimed at applications requiring data throughputs up to the 1 - 2Gbps ...

Helion have a number of solutions which implement the SHA-256 algorithm; we consider the "Fast" version here, which is aimed at applications requiring data throughputs up to the 1 to 2Gbps range. ...

Helion have a number of solutions which implement the SHA-384 and SHA-512 algorithms; we consider the "Fast" versions here, which are aimed at applications requiring data throughputs up to the ...

This hardware IP core features a full Secure Hash Algorithm SHA1.

The Microsemi PolarFire FPGA is offered with an available TeraFire® EXP-F5200B cryptography microprocessor, provided as hard IP on the device. Athena’s portfolio of TeraFire® cryptographic ...