Rambus DPA Resistant HMAC-SHA-2 Cryptographic Accelerator Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. HMAC-SHA-2 100 million trace DPA resistant cryptographic accelerator core.
The DPA Resistant Hardware cores offer chipmakers an easy-to-integrate technology-independent soft-macro security solution with built-in side-channel resistance for cryptographic functions across a wide array of devices.
These high-performance cores provide a higher level of protection than standard security cores, while improving time-to-market, as all the cores are validated DPA countermeasures. It is highly flexible for integration with standard cipher modes such as Cipher Block Chaining (CBC), Counter (CTR) and Authenticated Encryption mode / Galois Counter (GCM) modes. The fast AES core performs AES encryption with DPA protection using only 2 clock cycles per AES round, outperforming any existing solution.