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Weapons Bus PP194 IP with DDC software API and register compatiability
MIL-STD-1553B Notice 2 Bus Controller, Remote Terminal, Bus monitor IP Core for FPGA and ASIC Devices The BRM1553D IP Core is suitable for any Mil-Std-1553 implementation. The core incorporates a backend logic that arranges the messages in a predefined memory and registers structure, which simplifies the interface between the 1553 bus and the local CPU. The BRM1553D core provides DDC® Enhanced MINI-ACE® compatiability to support exsisting software implementations. The MIL-STD-1553 IP can be licensed with the cyber security or wiring fault capabilities out of the box.
特色
- MIL-STD-1553 A and B Compliant IP for FPGA and ASIC designs
- EBR 1553 (10Mbit/s MIL-STD-1553) with 40 Meter wiring support
- Supports Bus Controller, Remote Terminal and Monitor multi channel implementations
- DO-254 DAL A compatiable
- Compatiable with DDC® ACE® and Enhanced MINI-ACE® interface and functionality, works with existing software drivers
- Supports any clock frequency, reduces clock domains
- Provided with full verification environment
- Passed full RT validation testing by 3rd party
- Based on vendor and technology independent VHDL code
- Includes cyber security message authentication for all units on the bus
- Includes advanced wiring fault detection capability for improved aircraft maintainability
- Device drivers for : VxWorks 7.0, Linux, Embedded Linux, Integrity, QNX , PikeOS
优势
- Compatibility
- H009/MacAir
- WB194 (Wmux)
- 1Mbps Data Rate
- Sinus (H009) or Trapezoid signal when used with Sital Transceiver
- Enhanced DDC® Micro-ACE® interface
- PCI Interface
- PCI specification 2.3 compliant
- 33MHz performance (66MHz optional)
- 32 bit datapath
- Zero wait states burst mode
- Full Target functionality
- RAM
- 4, 8, 16, 32, 64K by 16 bits Dual Port RAM (Limited by FPGA resources only)
- Clock
- Any even frequency from 12MHz and higher (12, 14, 16… 98, 100MHz, …)
- Including 33MHz for PCI and 125MHz for PCI Express implementations
- Supported FPGAs
- Any FPGA with sufficient number of LUTs and Dual-Port memory
- FPGA families from the following vendors: Xilinx, Altera, Lattice, Actel
可交付内容
- VHDL net list for FPGA vendor and memory
- User's manual
- Sample VHDL code that incorporates the core
- Synthesis script for sample code
Block Diagram of the Weapons Bus PP194 IP with DDC software API and register compatiability
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