The Mentor Graphics?parallel ATA host interface core provides an efficient and easy-to-use interface to IDE and ATAPI devices. The core implements programmable I/O, multi-word direct memory access (DMA), and Ultra ATA-33, -66, -100, and -133 modes of operation and supports up to two devices. The core interface to the SoC provides PIO access and DMA capability to optimize data transfers to and from the IDE devices. Two sets of timing registers, and two
addressing windows are provided - one for the primary IDE interface and one for the secondary. This core is compatible with ATA-4 with Ultra ATA-33, -66, -100, and -133 extensions. However, single-word DMA is not supported.