PHY layer solution for PCIe1.1/PCIe2.0 with a serial interface and PIPE3 compliant digital interface
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UART : Universal Asynchronous Receiver Transmitter Core
Universal Asynchronous Receiver Transmitter Core performs serial-to-parallel conversion on data characters received from a peripheral device or a MODEM and parallel-to-serial conversion on data characters received from the processor. It is compliant with the standard UART 16550 Specification.
Register based configuration enables easy hook-up with a wide range of embedded applications.
Register based configuration enables easy hook-up with a wide range of embedded applications.
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