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Silicon IP Catalog
Memory & Logic Library
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Memory & Logic Library IP Core

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Memory & Logic Library IP Listing

5397 IP Cores (1961 - 2000)

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NVM OTP in SMIC (180nm, 110nm, 65nm, 55nm, 40nm)

Designers face the challenge of creating secure, cost-effective, low power, and reliable designs. Synopsys’ embedded one-time programmable (OTP) non-volatile memory (NVM) technology enables ...

1961
NVM OTP in TSMC (180nm, 130nm, 110nm, 90nm, 65nm, 55nm, 40nm, 28nm, 16nm)

Designers face the challenge of creating secure, cost-effective, low power, and reliable designs. Synopsys’ embedded one-time programmable (OTP) non-volatile memory (NVM) technology enables ...

1962
TSMC CLN40LP LVDS Receiver for FPD-Link

IGALVDS04A FPD-link receiver converts the five LVDS (Low Voltage Differential Signaling) data streams back into parallel 18/24/30-bit of 1.1V CMOS data. The receiver’s outputs are falling ...

1963
UMC 0.45um Logic process standard gate array asynchronous embedded array high density two port (1R1W) SRAM memory compiler.

UMC 0.45um Logic process standard gate array asynchronous embedded array high density two port (1R1W) SRAM memory compiler.

1964
UMC 0.5um Logic process standard asynchronous high density two port (1R1W) SRAM memory compiler.

UMC 0.5um Logic process standard asynchronous high density two port (1R1W) SRAM memory compiler.

1965
UMC 0.5um Logic process standard asynchronous low density low power two port (1R1W) SRAM memory compiler.

UMC 0.5um Logic process standard asynchronous low density low power two port (1R1W) SRAM memory compiler.

1966
UMC 0.13um Al Standard performance process standard synchronous high density dual port SRAM compiler

UMC 0.13um Al Standard performance process standard synchronous high density dual port SRAM compiler

1967
55 SP Dual Port SRAM compiler with 1P4M metal option

55 SP Dual Port SRAM compiler with 1P4M metal option

1968
UMC 55nm EFLASH Process Dual-Port SRAM Memory Compiler

UMC 55nm EFLASH Process Dual-Port SRAM Memory Compiler

1969
UMC 55nm eFlash Process Dual-Port SRAM with Row redundancy

UMC 55nm eFlash Process Dual-Port SRAM with Row redundancy

1970
UMC 55nm eFlash eFlash Dual-Port SRAM Memory Compiler

UMC 55nm eFlash eFlash Dual-Port SRAM Memory Compiler

1971
55nm eFlash Dual-Port SRAM memory compiler with row redundancy

55nm eFlash Dual-Port SRAM memory compiler with row redundancy

1972
UMC 55nm LP process with PG Dual port SRAM compiler

UMC 55nm LP process with PG Dual port SRAM compiler

1973
UMC 28nm HPC process Two Port Register File with LVT and Bank2

UMC 28nm HPC process Two Port Register File with LVT and Bank2

1974
UMC 28nm HPC process Two Port Register File with LVT and Bank4

UMC 28nm HPC process Two Port Register File with LVT and Bank4

1975
UMC 28nm HPC process PG Two Port Register File

UMC 28nm HPC process PG Two Port Register File

1976
UMC 28nm HPC process 2PRF with Bank2 & power gating

UMC 28nm HPC process 2PRF with Bank2 & power gating

1977
UMC 28nm HPC process PG-2PRF with Bank4

UMC 28nm HPC process PG-2PRF with Bank4

1978
UMC 28nm HPC process PG Two Port Register File with peri-HVT

UMC 28nm HPC process PG Two Port Register File with peri-HVT

1979
UMC 28nm HPC process 2PRF, HVT & Bank2

UMC 28nm HPC process 2PRF, HVT & Bank2

1980
UMC 28nm HPC process PG-2PRF with HVT Bank4

UMC 28nm HPC process PG-2PRF with HVT Bank4

1981
UMC 28nm HPC process PG Two Port Register File with peri-LVT

UMC 28nm HPC process PG Two Port Register File with peri-LVT

1982
UMC 28nm HPC process 2PRF with LVT and Bank 2

UMC 28nm HPC process 2PRF with LVT and Bank 2

1983
UMC 28nm HPC process PG-2PRF with LVT and Bank 2

UMC 28nm HPC process PG-2PRF with LVT and Bank 2

1984
UMC 80nm HV Process PG Single-Port SRAM Memory Compiler_x000D_

UMC 80nm HV Process PG Single-Port SRAM Memory Compiler

1985
UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.

UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.

1986
UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.

UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.

1987
UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler with redundancy.

UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler with redundancy.

1988
UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.

UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.

1989
Global Foundries 55nm LowPower LowK Process synchronous high density low power single port SRAM memory compiler.

Global Foundries 55nm LowPower LowK Process synchronous high density low power single port SRAM memory compiler.

1990
Global Foundries 55nm Low Power LowK Process synchronous high density low power single port SRAM memory compiler.

Global Foundries 55nm Low Power LowK Process synchronous high density low power single port SRAM memory compiler.

1991
Global Foundries 55nm Low Power LowK Process synchronous high density low power single port SRAM memory compiler.

Global Foundries 55nm Low Power LowK Process synchronous high density low power single port SRAM memory compiler.

1992
High Performance and High Density Single Port SRAM Compiler with Row & Column Redundancy Option - TSMC 16nm 16FFC (CLN16FFC)

Dolphin Technology maintains a broad IP portfolio of Memory Compilers, Specialty Memory and Memory Test & Repair (Memory BIST), providing SoC designers with solutions optimized for low power, ...

1993
High Performance and High Density Two Port Register File Compiler with Row & Collumn Redundancy Option - TSMC 16nm 16FFP (CLN16FFP)

Dolphin Technology maintains a broad IP portfolio of Memory Compilers, Specialty Memory and Memory Test & Repair (Memory BIST), providing SoC designers with solutions optimized for low power, ...

1994
30nm Channel Length - Ultra High Density 6.5 - track Standard Cell library - TSMC 28NM 28HPM (CLN28HPM)

Dolphin offers an extensive array of Standard Cell libraries that have been methodically tested and verified in silicon for each process technology supported. More than 5000 fully customizable ...

1995
30nm Channel Length - Ultra High Performance & High Density 12 - track Standard Cell library - TSMC 28NM 28HPC (CLN28HPC)

Dolphin offers an extensive array of Standard Cell libraries that have been methodically tested and verified in silicon for each process technology supported. More than 5000 fully customizable ...

1996
35nm Channel Length - Ultra High Density 6.5 - track Standard Cell library - TSMC 28NM 28HPM (CLN28HPM)

Dolphin offers an extensive array of Standard Cell libraries that have been methodically tested and verified in silicon for each process technology supported. More than 5000 fully customizable ...

1997
40nm Channel Length - High Performance & High Density 10 - track Standard Cell library - TSMC 28NM 28LP (CLN28LP)

Dolphin offers an extensive array of Standard Cell libraries that have been methodically tested and verified in silicon for each process technology supported. More than 5000 fully customizable ...

1998
40nm Channel Length - Ultra High Density 6.5 - track Standard Cell library - TSMC 28NM 28HPM (CLN28HPM)

Dolphin offers an extensive array of Standard Cell libraries that have been methodically tested and verified in silicon for each process technology supported. More than 5000 fully customizable ...

1999
Dual-Rail SP SRAM Globalfoundries 22FDX

Ultra-low voltage logic designs utilizing adaptive body biasing demand for dense SRAM solutions which fully integrates in the ABB aware implementation and sign-off flow of the Racyics® ABB ...

2000

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