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Memory & Logic Library
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Memory & Logic Library IP Listing

5104 IP Cores (1961 - 2000)

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UMC 0.18um Generic process MPCA core cell library

UMC 0.18um Generic process MPCA core cell library

1961
1.8v LVDS RX IO 800Mbps, UMC 40nm LP/RVT LowK Logic Process

1.8v LVDS RX IO 800Mbps, UMC 40nm LP/RVT LowK Logic Process

1962
55nm-SP, FPD-Link Receiver, 3.3V/1.0V, 4 data plus 1 clock channel, 16~85MHz, DLL type,

55nm-SP, FPD-Link Receiver, 3.3V/1.0V, 4 data plus 1 clock channel, 16~85MHz, DLL type,

1963
28nm HPC, LVDS RXIO, 500Mbps, 1.8V/0.9V

28nm HPC, LVDS RXIO, 500Mbps, 1.8V/0.9V

1964
Embedded OTP (One-Time Programmable) IP, 1.2V/6V/+-16V HV

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1965
Embedded OTP (One-Time Programmable) IP, 1.2V/6V/+-16V HV

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1966
Embedded OTP (One-Time Programmable) IP, 1.2V/6V/32V HV

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1967
Embedded OTP (One-Time Programmable) IP, 1.3V/6V/30V HV

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1968
Embedded OTP (One-Time Programmable) IP, 1.2V/6V/32V HV

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1969
Embedded OTP (One-Time Programmable) IP, 1.2V/3.3V Logic_True_Shrink

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1970
Embedded OTP (One-Time Programmable) IP, 1.2V/3.3V Logic

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1971
Embedded OTP (One-Time Programmable) IP, 1.2V/3.3V Logic

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1972
Embedded OTP (One-Time Programmable) IP, 1.5V/5V BCD

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1973
Embedded OTP (One-Time Programmable) IP, 1.2V/6V/+-16V HV

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1974
Embedded OTP (One-Time Programmable) IP, 1.8V/3.3V Logic

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1975
Embedded OTP (One-Time Programmable) IP, 3.3V Green

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1976
Embedded OTP (One-Time Programmable) IP, 3.3V Green

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1977
Embedded OTP (One-Time Programmable) IP, 1.2V/3.3V Logic

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1978
Embedded OTP (One-Time Programmable) IP, 5V/40V BCD

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1979
Embedded OTP (One-Time Programmable) IP, 1.8V/5V/30V BCD

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1980
Embedded OTP (One-Time Programmable) IP, 1.8V/5V BCD

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1981
Embedded OTP (One-Time Programmable) IP, 1.8V/3.3V Logic

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1982
Embedded OTP (One-Time Programmable) IP, 3.3V Green

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1983
Embedded OTP (One-Time Programmable) IP, 3.3V Green

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1984
Embedded OTP (One-Time Programmable) IP, 3.3V Green

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1985
Embedded OTP (One-Time Programmable) IP, 1.2V/6V/32V HV

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1986
Embedded OTP (One-Time Programmable) IP, 3.3V Green

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1987
Embedded OTP (One-Time Programmable) IP, 3.3V Green

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1988
Embedded OTP (One-Time Programmable) IP, 1.8V/3.3V Logic

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1989
Embedded OTP (One-Time Programmable) IP, 1.5V/5V/32V HV_MR

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1990
Embedded OTP (One-Time Programmable) IP, 1.5V/5V/32V HV_MR

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1991
Embedded OTP (One-Time Programmable) IP, 1.5V/5V HV_LP

eMemory's NeoBit uses logic-based architecture for an embedded non-volatile memory (eNVM) design that eliminates the need for additional masking layers or extra process steps typically associated ...

1992
Embedded EEPROM IP, 1.8V/3.3V/5V EEPROM

eMemory's EEPROM series is a 2P4M non-volatile EEPROM IP block device which uses a MagnaChip SSTC EEPROM and is embedded into a Magnachip 0.18μm 1.8V/3.3V (7V) LP EEPROM process. The write ...

1993
Embedded EEPROM IP, 1.8V/3.3V/5V EEPROM

eMemory's EEPROM series is a 2P4M non-volatile EEPROM IP block device which uses a MagnaChip SSTC EEPROM and is embedded into a Magnachip 0.18μm 1.8V/3.3V (8V) LP EEPROM process. The write ...

1994
Embedded EEPROM IP, 1.8V/3.3V/5V EEPROM

eMemory's EEPROM series is a 2P4M non-volatile EEPROM IP block device which uses a MagnaChip SSTC EEPROM and is embedded into a Magnachip 0.18μm 1.8V/3.3V (9V) LP EEPROM process. The write ...

1995
Embedded EEPROM IP, 1.8V/3.3V/5V EEPROM

eMemory's EEPROM series is a 2P4M non-volatile EEPROM IP block device which uses a MagnaChip SSTC EEPROM and is embedded into a Magnachip 0.18μm 1.8V/3.3V 10V) LP EEPROM process. The write ...

1996
Embedded EEPROM IP, 1.8V/3.3V/5V EEPROM

eMemory's EEPROM series is a 2P4M non-volatile EEPROM IP block device which uses a MagnaChip SSTC EEPROM and is embedded into a Magnachip 0.18μm 1.8V/3.3V 11V) LP EEPROM process. The write ...

1997
MCU PAD - SMIC 55nm Eflash

1.8V/3.3V/1.2V power supply can be used;  Including ultra-low leakage MCU I/O total solution;  Supports 1.2V core voltage power off, and get ultra-low leakage;  Provides a wide variety ...

1998
MCU PAD - SMIC 55nm Eflash

Supports 1.2V off with 3.3V/2.5V latches ; Low power crystal oscillator amplifier, the current of 32.768KHz crystal is lower than 200nA ; Standard I/O size is low to 70um*128um ; HBM ESD: >2000V; ...

1999
16K8 MTP

XRX018BCDMTP_16K8A is a BCD compatible embedded non-volatile memory IP with 16k8 ROM density. This IP could be used for code storage, firmware update, parameter setting, trimming and calibration, ...

2000

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