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Interface Controller & PHY
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Interface Controller & PHY IP Listing

2464 IP Cores (1121 - 1160)

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Fast Ethernet 802.3 Media Access Controller (MAC)

The Arasan 10/100 Ethernet Media Access Controller with AHB Interface IP core is compliant to the Ethernet/IEEE 802.3-2008 standard. The 10/100 Ethernet - AHB IP core provides a 10/100 Mbps ...

1121
Fast Ethernet 10/100 802.3 MAC with IEEE 1588 PTP Support

The Arasan 10/100 Ethernet Media Access Controller with IEEE 1588 support IP core is compliant to the Ethernet/IEEE 802.3-2008 standard. It also includes hardware to parse and accurately time-stamp ...

1122
Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto

The Gigabit Ethernet Media Access Controller with IEEE 1588 PTP IP core is compliant to the Ethernet/IEEE 802.3-2008 standard and has hardware based support for for IEEE 1588 V1 and V2. It ...

1123
ONFI 2.3 NAND Flash Controller

The Arasan ONFI 2.3 NAND Flash Controller IP Core is a full featured, easy to use, synthesizable core, easily integrated into any SoC or FPGA development. Designed to support both SLC and MLC ...

1124
AMBA AHB to APB Bus Bridge Core

The AHB2APB implements an AHB to APB bus bridge, allowing the connection of peripherals with an APB interface to an AHB bus. The highly-configurable core translates read or write AHB bus transactions ...

1125
General-Purpose I/O Controller Core

The GPIO core is used to create functions in a system that are not implemented with dedicated controllers, and require simple input and/or output software-controlled signals. The number of ...

1126
Internal Synchronous SRAM Controller Core

The SRAM-CTRL implements a SRAM Controller providing a standard AHB/APB interface to translate AHB/APB bus reads and writes into reads and writes with the signaling and timing of a standard ...

1127
AHB to APB Bus Bridge

The AHB to APB Bridge translates an AHB bus transaction (read or write) to an APB bus transaction. This is accomplished via two small state machines - one on the HCLK domain and another on ...

1128
AHB External Bus Interface

The AHB External Bus Interface (EBI) allows a CPU or AHB Master (such as a DMA core) to transmit and receive data to an external device such as an external SRAM or Parallel Flash device. ...

1129
AHB system Peripheral IP, External Bus controller, Soft IP

External Bus Interface Controller.

1130
AHB system Peripheral IP, SRAM/ROM Controller, Soft IP

Embedded synchronous Single Port SRAM/ROM memory controller with up to two AHB slave ports.

1131
AHB system Peripheral IP, AHB - to - AHB Bridge, Soft IP

AHB to AHB bridge.

1132
AHB system Peripheral IP, AHB - to - AXI Bridge, Soft IP

AHB to AXI bridge.

1133
AHB system Peripheral IP, Interrupt controller, Soft IP

Interrupt controller with AHB interface.

1134
AHB system Peripheral IP, AHB - to - AXI Bridge, Soft IP

AMBA AXI to AHB Bridge.

1135
RGB to CCIR 601 / 656 Encoder

The Digital Blocks DB1892AXI RGB to CCIR 601 / CCIR 656 Encoder interfaces RGB data along with synchronization signals from a LCD Controller such as Digital Blocks' DB9000 TFT LCD Controller ...

1136
BitBLT Graphics Hardware Accelerator (AXI Bus)

The BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from commands to combining existing bitmaps on and off-screen using one of 256 Raster ...

1137
BitBLT Graphics Hardware Accelerator (AHB Bus)

The Digital Blocks DB9100AHB BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from commands to combining existing bitmaps on and off-screen ...

1138
BitBLT Graphics Hardware Accelerator (AXI4 Bus)

The Bit Block Transfer (BitBLT) Graphics Engine IP Core provides hardware acceleration of block moves with Raster Operation (256 data manipulation operations) of off-screen or on-screen data ...

1139
RTP / UDP / IP Hardware Stack for Raw, Uncompressed RGB/YUV Video Streams

The RTP / UDP / IP Hardware Stack IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor targeting low latency, full off-load from ...

1140
Hs-Mode I2C Controller - 3.4 Mbps, Master w/FIFO

The Hs-Mode I2C Controller IP Core interfaces a microprocessor via the AMBA AXI / AHB / APB Bus or Avalon / Qsys Bus to an I2C Bus in Hs-Mode (3.4 Mbit/s) / Fast-Mode Plus (1 Mbit/s) / Fast-Mode ...

1141
Hs-Mode I2C Controller - 3.4 Mbps, Slave w/FIFO

The Hs-Mode I2C Controller IP Core interfaces user Registers to an I2C Bus or Memory (SDRAM / SRAM / Flash / FIFO) or any Peripheral or CPU connecting through an internal AHB / APB / AXI / Avalon ...

1142
SPI Master / Slave Controller w/FIFO (AHB & AHB-Lite Bus)

The Digital Blocks DB-SPI-MS is a Serial Port Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfers. The DB-SPI-MS contains an AMBA AXI, AHB, or APB Bus Interface ...

1143
SPI Master / Slave Controller w/FIFO (AXI & AXI-Lite Bus)

The Digital Blocks DB-SPI-MS is a Serial Port Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfers. The DB-SPI-MS contains an AMBA AXI, AHB, or APB Bus Interface ...

1144
2D Graphics Hardware Accelerator (AXI4 Bus)

The DB9200AXI4 2D Graphics Engine Verilog IP Core targets low VLSI footprint, high-performance hardware accelerated graphics applications. The DB9200AXI4 2D Graphics Engine renders graphics ...

1145
SPI Master Controller w/FIFO (AHB & AHB-Lite Bus)

The Digital Blocks DB-SPI-M is a Serial Port Interface (SPI) Controller Verilog IP Core supporting only Master SPI Bus transfers (both Full Duplex and Half Duplex). The DB-SPI-M contains an ...

1146
SPI Master Controller w/FIFO (APB Bus)

The Digital Blocks DB-SPI-M is a Serial Port Interface (SPI) Controller Verilog IP Core supporting only Master SPI Bus transfers (both Full Duplex and Half Duplex). The DB-SPI-M contains an ...

1147
Digital Down Converter core

The eSi-DDC is a Digital Down Converter combining a Digital Frequency Synthesizer (DDS) with a Digital Mixer. The DDS is implemented in a resource efficient way achieving a 16x table compression. ...

1148
RSA public key cryptography with APB interface

The standard RSA module is available as an APB peripheral, where it seamlessly integrates with EnSilica's cryptography library. The peripheral can be configured for between 512 and 4096-bit ...

1 Testimonial
Afshin Rezayee, Founder and Co-President, Kili Corporation

1149
Digital IIR filter with APB interface

A range of 5th to 11th order digital IIR filters for conditioning and optionally decimating data from an external source and to DMA the output into processor memory. The filter is available ...

1150
SPI to AMBA AHB Master Bridge

The SPI to AMBA AHB Master Bridge Design IP offers a simple solution to provide "backdoor" access from external SPI master devices to the embedded AMBA AHB bus. The SPI to AMBA AHB Bridge utilizes ...

1151
AMBA AHB Slave to Local Interface Bridge

The Veriest AMBA AHB Slave Bridge Design IP offers a simple solution to provide a bridge between the embedded AMBA AHB bus and a simplified generic local bus. The Veriest AMBA AHB Slave Bridge ...

1152
AMBA AHB Simple Master Bridge

The Veriest AMBA AHB Simple Master Bridge Design IP provides a bridge between the embedded AMBA AHB bus master and a simplified generic local bus. The Veriest AMBA AHB Simple Master Bridge is ...

1153
AHB to APB Mailbox Interface

CoreMBX (Mail Box) allows data messages (mail) to pass back and forth from one processing element to another. The user is able to choose whether this message passing capability is implemented ...

1154
On-chip Nonvolatile APB Memory Controller

CoreApbNvm allows advanced microcontroller bus architecture (AMBA) Peripheral Bus (APB) access to the Microsemi Fusion nonvolatile memory (NVM), using a simple register-based access scheme. ...

1155
AMBA 3.0 AHB to APB3 bridge

CoreAHBtoAPB3 (AMBA 3.0 Bridge) is an AHB slave and AMBA 3 APB master that provides an interface (bridge) between the high-speed AHB domain and the low-power APB domain. The CoreAHBtoAPB3 interfaces ...

1156
AXI to APB Bridge

The AXI (Advanced eXtensible Interface) to APB (Advanced Peripheral Bus) Bridge translates AXI4-Lite transactions into APB transactions. It functions as a slave on the AXI4-Lite interface and ...

1157
AHB Lite to AXI Bridge

The AMBA® (Advanced Microcontroller Bus Architecture) AHB-Lite (Advanced High Performance Bus) to AXI (Advanced extensible interface) bridge translates AHB-Lite transactions into AXI4 transactions. ...

1158
32 bit Microprocessor compatible to ARMv7-m ISA (Cortex-M3)

compatible to ARMv7-M Instruction Set Architecture (Cortex-M3) ; single clock, static design ; single AMBA V2.0 AHB bus interface ; vectored interrupt controller ; enhanced instructions ; ...

1159
32 Bit microcontroller compatible to ARMv6-M ISA (Cortex-M0)

compatible to ARMv6-M Instruction Set Architecture (Cortex-M0) ; single clock, static design ; single AMBA V2.0 AHB bus interface ; 56 Thumb-2 instructions ; 12,500 gates ; 0.04mm² @ 90nm ; ...

1160

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