Scalable multicore architecture for a range of macrocells, small cells, cloud-RAN, DFE/DPD/ and more
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Bandgap reference (0.7 V output, optimized for SOC integration, UMC 180 nm)
The bandgap reference is optimized for integration into SOCs, ASICs, FPGAs, microprocessors and other large mixed-signal microchips.
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Power Management IP
- Intelligent Sensor and Power Management Design Platform
- eFPGA Tile with power management for TSMC 40ULP & 40LP
- Power Management Unit
- CoreDCDC: High-Performance DCDC for Power management - TSMC 180nm
- Power Management Unit (2.3 - 3.0V output voltage, load current 150mA)
- SC9MCP Power Management Kit - GLOBALFOUNDRIES 14 nm 14LPP