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Silicon IP Catalog
Analog & Mixed Signal
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Analog & Mixed Signal IP Core

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Analog & Mixed Signal IP Listing

5706 IP Cores (5041 - 5080)

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Dual 7-Bit 3GHz ADC

The AD0100 is a dual 7-bit 3GSps analog-to-digital converter designed in the TSMC 28 HPM process. Each ADC uses parallel successive approximation register ADCs in an interleaved topology.

5041
103 dB of SNR, 24-bit stereo multichannel audio CODEC with capless headphone outputs, suitable for 5.1 applications

SNR performance and integration issues make System designers reluctant to consider integrating audio Codec IP in applications like PC sound card and DVD player where high definition audio is ...

5042
Linear Regulator, low quiescent current, no DELTA standard

1.8 V output reference voltage with 5% accuracy ; Configuration of output current from 100 mA to 1000 mA ; Suitable for logic islet and analog islet; Low quiescent current: 35 uA ; Output ...

5043
GF L40LP 40nm IoT PLL - 30MHz-375MHz

The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication factors up to 8192, allowing the PLL to ...

5044
TSMC CLN28HPC+LVT 28nm DDR DLL - 195MHz-975MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock cycle. It uses a phase-locked analog delay ...

5045
TSMC CLN7FF 7nm Multi Phase DLL - 400MHz-2000MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock. It delivers optimal jitter performance ...

5046
Voltage Domain Interfacing Cells for use between power domains using core transistors.

LS-CDM are Level Shifter with CDM protection are Domain Interfacing Cells. Provided as High-Low and Low-High level shifters including isolation and CDM protection features they are designed ...

5047
TSMC CLN12FFCLL 12nm DDR DLL - 250MHz-1250MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock cycle. It uses a phase-locked analog delay ...

5048
TSMC CLN22ULPLVT 22nm DDR DLL - 200MHz-1000MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock cycle. It uses a phase-locked analog delay ...

5049
UMC L110LL 110nm Deskew PLL - 120MHz-600MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the clock reference by an integer between 1 ...

5050
SC9MC Power Management Kit - TSMC 28 nm CLN28HPM

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

5051
SC9MC Power Management Kit - TSMC 28 nm CLN28HPM

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

5052
SC7MC High Performance Kit - UMC 28 nm L28HPC

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

5053
SC12MC Retention Kit - SMIC 28 nm 28HKMG

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

5054
SC12MC Retention Kit - UMC 28 nm L28HPM

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

5055
SC12MC Retention Kit - UMC 28 nm L28HPM

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

5056
SMIC 0.13um Low Leakage APLL

The SMIC 0.13um Low Leakage APLL is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO of this PLL can run up to 1000MHz. It contains a 64 (max) input clock ...

5057
Power-on Reset

IP 250iHP_PoR_01 is power-on reset unit which produces a reset signal after rising supply voltage to produce the initial state of the triggers. The block consists of voltage detector, power ...

5058
A/D Converter IP, 10 bits, 1Msps (Max clock rate: 13MHz), with 8-to-1 input MUX, UMC 90nm SP process

FXAnalog-to-Digital converter143HD0A with 8-to1 Mux for FTC, UMC 90um SP/RVT Low-K Logic process.

5059
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, UMC 0.11um HS/AE process

10-Bit 1MSPS SAR Analog-to-Digital converter with 8-to-1 Mux, UMC 0.11um AL/HS Logic process.

5060
PLL (Frequency Synthesizer) IP, Input: 20MHz - 200MHz, Output: 62.5MHz - 1GHz, UMC 28nm HPM process

Input 20M-200MHz, output 62.5M-1GHz, frequency synthesizable PLL, UMC 28nm Logic and Mixed-Mode HPM process.

5061
PLL (Frequency Synthesizer) IP, Input: 25MHz - 200MHz, Output: 1GHz -1.5GHz, UMC 90nm SP process

Input 25M-200MHz, output 1000M-1500MHz, frequency synthesizable PLL, UMC 90nm SP/RVT Low-K Logic process.

5062
PLL (Frequency Synthesizer) IP, Input: 25MHz - 200MHz, Output: 62.5MHz - 1GHz, UMC 28nm HPM process

Input 25M-50MHz, output 1000M-2000MHz, frequency synthesizable PLL, UMC 28nm Logic and Mixed-Mode HPM process.

5063
PLL (Frequency Synthesizer) IP, Input: 45KHz - 60KHz, Output: 81MHz - 132MHz, UMC 0.11um HS/FSG process

Input 45k-60KHz, output 81M- 132MHz, PLL, UMC 0.11um HS/FSG Logic process.

5064
PLL (Frequency Synthesizer) IP, Input: 4MHz - 200MHz, Output: 20MHz - 400MHz, UMC 0.18um G2 process

Input 4M-200MHz, output 20M-400MHz, frequency synthesizable PLL, UMC 0.18um GII Logic process.

5065
PLL (Frequency Synthesizer) IP, Input: 5MHz - 100MHz, , Output: 20MHz - 300MHz, UMC 0.25um process

Input 5M-100MHz, output 20M-300MHz, frequency synthesizable PLL, 0.25um Logic process.

5066
PLL (Frequency Synthesizer) IP, Input: 5MHz - 100MHz, Output: 62/5MHz - 1GHz, UMC 0.13um HS/FSG process

Input 5M-100MHz, output 62.5M-1000MHz, frequency synthesizable PLL with power/ground pad, UMC 0.13um HS/FSG Logic process.

5067
10-bit, 50 MSPS Ultra Low Power ADC in 22nm CMOS

The ODT-ADS-10B50M-22 is a low power, high speed 10-bit 50 MSPS ADC in a standard 22nm CMOS process, implemented using Omni Design's groundbreaking low power SWIFT technology. The ADC achieves ...

5068
10-bit, 600 MSPS Ultra Low Power ADC in 22nm CMOS

The ODT-ADS-10B600M-22 is a low power, high speed 10-bit 600 MSPS ADC in a standard 22nm CMOS process, implemented using Omni Design's groundbreaking low power SWIFT technology. The ADC achieves ...

5069
12-bit, 600 MSPS Ultra Low Power ADC in 7nm CMOS

The ODT-ADS-12B600M-7 is a low power, high speed 12-bit 600 MSPS ADC in a standard 7nm CMOS process, implemented using Omni Design's groundbreaking low power SWIFT technology. The ADC achieves ...

5070
12-bit, 50 MSPS Ultra Low Power ADC in 14nm CMOS

The ODT-ADS-12B50M-14 is a low power, high speed 12-bit 50 MSPS ADC in a standard 14nm CMOS process, implemented using Omni Design's groundbreaking low power SWIFT technology. The ADC achieves ...

5071
12-bit, 50 MSPS Ultra Low Power ADC in 16nm CMOS

The ODT-ADS-12B50M-16 is a low power, high speed 12-bit 50 MSPS ADC in a standard 16nm CMOS process, implemented using Omni Design's groundbreaking low power SWIFT technology. The ADC achieves ...

5072
12-bit, 600 MSPS Ultra Low Power ADC in 16nm CMOS

The ODT-ADS-12B600M-16 is a low power, high speed 12-bit 600 MSPS ADC in a standard 16nm CMOS process, implemented using Omni Design's groundbreaking low power SWIFT technology. The ADC achieves ...

5073
16-22Bit Stereo Audio CODEC with Linein/Microphone Recording, Lineout/Headphone Playback, SMIC 0.11um

The AR34S5C is a silicon-proven, low-power, ultra compact 16-22bit stereo audio CODEC IP fabricated in SMIC110nm logic process. The CODEC IP core employs sigma-delta modulator architecture and ...

5074
Ultra-low power and high performance 12bit 1Msps SARADC

Supports 1Ksps~2Msps sampling rate; 8-channel differential inputs or 20-channel single-ended inputs; High performance: ENOB≥11.0bit @1Msps; Ultra-low power:

5075
Low Noise Amplifier, 2.36GHz-2.5GHz - GlobalFoundries 130nm RFSOI

Low Noise Amplifier, 2.36GHz-2.5GHz - GlobalFoundries 130nm RFSOI

5076
Ultra-low-power 10-Bit, 100 KSPS, 1.8V CMOS A/D Converter

The KTAD100011 is a 10-bit monolithic sampling analog-to-digital converter (ADC) with a fully-differential wideband on-chip track-and-hold circuit that is capable of preserving high quality ...

5077
8-bit 5 MHz Pipelined ADC (Lower power)

5078
5V to 2.5V and 3.3V Low Power Voltage Regulator

5079
Low Power Voltage Regulator,3.3V to 1.8V, Maximum Current:300 mA

5080

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