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WLAN/WiMAX Analog Front End
This compact low-power Analog Front- End has been designed for wireless systems as the baseband part of the solution. The AFE consists of two ADC IQ pairs, two DAC IQ pairs, one auxiliary ADC and DAC and a clock generation block. This AFE would form the baseband part of a two chip solution. The AFE is intended for integration into a larger digital baseband chip and acts as the communication medium between the RF and digital blocks. The design does not require any special analog options using the baseline digital CMOS process makes it ideal for integration with a DSP engine
特色
- 90nm 7 Metal CMOS (No analog options)
- Dual voltage supply: 1.2V and 3.3V
- I/Q Rx path
- Two 10-bit 40MSPS IQ-ADCs
- Dynamic performance: 56dB SINAD at fIN=20MHz; 68dB SFDR at fIN=20MHz
- I/Q Tx path
- Two 12 bit 40MSPS IQ-DACs: Typical SFDR of 68dBc; INL < 2LSB and DNL < 0.5LSB
- Auxiliary ADC
- 8 bit 20 MSPS
- 4 multiplexed inputs
- Auxiliary DAC
- 8 bit 1MSPS
- INL < 1LSB and DNL < 0.5LSB
- Clock generation block consisting of a PLL and clock divider block
- Programmable to 1.2GHz
- Low longterm jitter
- Low phase noise
- Stand-by and Power Down modes
- Low Power
- 35mW per IQ-ADC at 40 MSPS
- Core area 3.46mm2 (for shown configuration)
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