Northwest Logic High-performance PCIe-AXI Bridge and/or scatter-gather DMA from Rambus
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USB 3.0/2.0 PHY TSMC 28HPC
The USB 3.0-Only PHY IP is a hard PHY macro for the TSMC 28HPC process. Integrated I/O pads and ESD structures are available.
The USB 3.0-Only PHY IP supports the USB 3.0 specification at the speed of 5Gbps. It is designed to easily integrate with a Cadence USB controller, or any third-party controller with a PIPE-compliant interface. It also supports the USB On-The-Go supplement to provide USB host and USB device operation.
The USB 3.0-Only PHY IP supports the USB 3.0 specification at the speed of 5Gbps. It is designed to easily integrate with a Cadence USB controller, or any third-party controller with a PIPE-compliant interface. It also supports the USB On-The-Go supplement to provide USB host and USB device operation.
查看 USB 3.0/2.0 PHY TSMC 28HPC 详细介绍：
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