MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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UMC 90nm LL-RVT (Low-K) Process with 3.3V device analog esd IO group (with BOAC)
UMC 90nm LL-RVT (Low-K) Process with 3.3V device analog esd IO group (with BOAC)
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Logic Libraries IP
- Duet Package of Embedded Memories and Logic Libraries for GF (55nm, 40nm, 22nm)
- Duet Package of Embedded Memories and Logic Libraries for Huali (55nm, 40nm)
- Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
- Duet Package of Embedded Memories and Logic Libraries for TSMC (65nm, 40nm, 28nm, 16nm, N7, N6, N5, N4P)
- Duet Package of Embedded Memories and Logic Libraries for UMC (40nm, 28nm)
- SMIC 0.13um Low Leakage UHD RVT_x000D_ Logic standard cell library, compatible with E-Flash and EEPROM process.