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Memory & Logic Library
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Memory & Logic Library IP Listing

5104 IP Cores (3641 - 3680)

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SSTL2 Specialty IO - GLOBALFOUNDRIES 90 nm CMS9FLP

ARM offers a broad portfolio of silicon-proven Interface IP designed to meet varying system architectures and standards required for today's SoC. The broad array of General Purpose I/O, and ...

3641
SSTL Specialty IO - GLOBALFOUNDRIES 90 nm CMS9FLP

ARM offers a broad portfolio of silicon-proven Interface IP designed to meet varying system architectures and standards required for today's SoC. The broad array of General Purpose I/O, and ...

3642
USB 1.1 Specialty IO - 1st Silicon 250 nm FSI025-FC

ARM offers a broad portfolio of silicon-proven Interface IP designed to meet varying system architectures and standards required for today's SoC. The broad array of General Purpose I/O, and ...

3643
High Density Dual Port SRAM Compiler - CSMC 130 nm CSMC13G

ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. ...

3644
High Speed Two Port Reg File Compiler - Dongbu 180 nm LP180SA

ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. ...

3645
High Speed Single Port SRAM Compiler - GLOBALFOUNDRIES 110 nm CH011N

ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. ...

3646
SC12MC Standard Cell Library - GLOBALFOUNDRIES 28 nm CMOS28HPP

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

3647
SC9MC Standard Cell Library - GLOBALFOUNDRIES 28 nm CMOS28LP

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

3648
High Density Via Programmable ROM Compiler - Samsung 32 nm CMOS32LP

ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. ...

3649
High Density Single Port SRAM Compiler - Samsung 45 nm CMOS11LP

ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. ...

3650
High Speed Single Port SRAM Compiler - Samsung 45 nm CMOS11LP

ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. ...

3651
High Density Single Port SRAM Compiler - Samsung 45 nm CMOS11LP

ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. ...

3652
GPIO General Purpose IO - Samsung 45 nm CMOS11LP

ARM offers a broad portfolio of silicon-proven Interface IP designed to meet varying system architectures and standards required for today's SoC. The broad array of General Purpose I/O, and ...

3653
GPIO General Purpose IO - Samsung 45 nm CMOS11LP

ARM offers a broad portfolio of silicon-proven Interface IP designed to meet varying system architectures and standards required for today's SoC. The broad array of General Purpose I/O, and ...

3654
SC12 Standard Cell Library - Samsung 45 nm CMOS11LP

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

3655
SC12MC Standard Cell Library - TSMC 28 nm CLN28HPM

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

3656
SC9MC Standard Cell Library - TSMC 28 nm CLN28HPM

ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering ...

3657
High Density Two Port Reg File Compiler - TSMC 65 nm CLN65LP

ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. ...

3658
High Speed Dual Port SRAM Compiler - UMC 90 nm L90G

ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. ...

3659
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell

VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell (06) Library developed by VeriSilicon supports power/ground pads, bi-directional I/O, and input buffer with pull-up only cells. This library ...

3660
VeriSilicon UMC 0.18μm CF I/O

VeriSilicon UMC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for UMC 0.18μm 1.8v/3.3v 1P6M Generic II logic process. This library supports inline I/O pads. ...

3661
VeriSilicon UMC 0.18μm CF I/O

VeriSilicon UMC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for UMC 0.18μm 1.8v/3.3v 1P6M Generic II logic process. This library supports inline I/O pads. ...

3662
SMIC 0.18um 90% shrunk Single-Port/Dual-Port SRAM, Two-Port Register File and Diffusion ROM Compiler

VeriSilicon SMIC 0.16um Synchronous Memory Compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.16um Logic 1P6M Salicide 1.8/3.3V process can flexibly generate ...

3663
ROM Compiler IP, UMC 0.11um SP process

UMC 0.11um high speed Logic process synchronous Via-1 ROM memory compiler.

3664
Standard Cell (Generic) Library IP, HVT, 7 tracks, UMC 28nm HLP process

UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library with LPLUS (C38).

3665
Standard Cell (Generic) Library IP, UMC 0.13um LL process

UMC 0.13um LL Logic/FSG process high density Core Cell Library.

3666
Low Leakage - Ultra High Speed One Port Register File (1 Port RF) Compiler with Column Redundancy Option - TSMC 28nm 28HP (CLN28HP)

Dolphin Technology maintains a broad IP portfolio of Memory Compilers, Specialty Memory and Memory Test & Repair (Memory BIST), providing SoC designers with solutions optimized for low power, ...

3667
6.5 Track High Density and Low Power Standard Cell Library (HDSC) in TSMC (22ULL/22ULP, 28HPC+)

M31 proposes the competitive 6.5 track high density and low power standard cells (HDSC) for 22nm/28nm technology nodes. To get the smallest cell area, M31 chooses the proper high density cell ...

3668
1 Gbps Rail to Rail LVDS receiver

LVDS_RX is LVDS receiver with rail to rail input range. The interface to the core logic includes the output signal pins (OUTp, OUTn) to receive data and the control pins (EN_RX) to configure ...

3669
2K8 MTP

XRS013LGCLFLASH_2K8 is a logic compatible embedded non-volatile memory IP with 2K8 ROM density. This IP could be used for code storage, firmware update, parameter setting, trimming and calibration, ...

3670
Embedded MTP (Multi-Time Programmable) IP, 1.8V/5V BCD

eMemory's NeoEE carries out electronic program-/erase- operations for 16k-bit (maximum) memory density and functions as a true rewritable memory technology, allowing up to 111K P/E cycling with ...

3671
LVDS Receiver 1250Mb/s, 800Mhz clock

V-Trans 's LVDS technology solutions eliminate the trade-offs in speed, low power, low noise (EMI), and BOM cost saving for high performance data transmission applications. This LVDS receiver ...

3672
LVDS serdes 28:4 channel compression TX 20-170Mhz

LVDS serdes 28:4 channel compression TX 140-1190 Mbs x4 FPD-LINK Transmitter 24-bit color 20-170Mhz This FPD Link Transmitter Macro is based on National Semiconductor openLDI specification ...

3673
1.8 V Bidirectional LVCMOS I/O with Programmable Schmitt Trigger, Drive & Pull-Up/Down

The 28nm lvcmos18 is a 1.8V LVCMOS bi-directional digital pad. It has an operating frequency of 200 MHz (400Mbps). Programmable pull-up, pull-down, drive strength and Schmitt trigger are some ...

3674
40nm Low Leakage HD, Channel Length 40nm, HVT Logic Process Standard cell Library

SMIC 40nm Low Leakage HD, channel length 40nm, HVT Logic Process Standard cell Library

3675
512bit Efuse with parallel input and parallel output

Program Voltage:2.5V, Program Temperature:10~40 degrees, 512bit Efuse with parallel input and parallel output

3676
SMIC 55nm High-Speed RVT Standard Library for Power Management Kit.

SMIC 55nm High-Speed RVT Standard Library for Power Management Kit.

3677
SMIC 130nm G LVDS 800Mbps Transmitter

SMIC 0.13um 1.2V/3.3VLogic Process; ; LVDS 800Mbps Transmitter.; Same height (200um) as SMIC 0.13um Standard IO Library sets (SP013D3);; Suitable for 6,7 and 8 layers application

3678
SMIC 130nm (LVt) high density standard cell library.

SMIC 130nm (LVt) high density standard cell library.

3679
This is capable to transferring data even when internal or exteral clock swings and overlaps each other

This is fully configurable Elastic Biffer with configurable Depth, Configurable width. Internal Storage Memory is implemented by Registers. It has internal CDC methodology which make it possible ...

3680

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