MIPI C-PHY/D-PHY Combo Universal IP, 4.5Gsps/4.5Gbps in TSMC 22ULP
Revolutionaly Ultra Low Phase Noise RF Amplifier-LNA IP
Both the single cell and the multi-stage amplifier feature outputs with signal swings ranging from high CML to CMOS signal levels. The sensitivity of the CML/CMOS cell is 28mV rms or 80mV pp, creating an output SNR of -171dBc, perfectly suitable for the almost zero noise amplification of off-chip, clock crystal or resonator fundamental or odd order signal magnitudes for clean clock ADC, DAC , Track and Hold, and ultra low noise switched capacitor applications. The sensitivity of the six stage example, 6 stage multi-stage RF amplifier, operating at 2.5Ghz is 280uV rms or 800uV pp, creating an output SNR of -161dBc making this configuration suitable for RF amplifier, LNA, and PLL applications.
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