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LDO Capless Fast Response Series ( Vin = 3.0-3.6V; Vo = 1.05-1.15V; Io = 10mA ) - Toshiba 40nm
The SGC75 are low-dropout (LDO), high current,fast response, low quiescent linear regulator IP solution for integration on SoC. It offers high power supply rejection (PSRR),soft start and over current protection. The IP uses advanced control techniques to achieve excellent transient response and still maintain low dropout and low quiescent. The SGC75 family is stable without the need for any external output capacitor. It is specified from Tj = -40ºC to +125ºC and is designed to achieve 4% overall accuracy (over Load/Line/Temp/Process)
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LDO IP
- LDO Voltage Regulator, 30 mA, Adjustable 0.45 V to 0.9 V Output
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- Analog Front End: 16x 12-bit 200 MSPS ADCs, 14x Voltage DACs, 4x 250 MSPS DACs, 4x TVM, LDO
- Analog Front End: 2x 12-bit 4 GSPS IQ ADCs, 2x 12-bit 8GSPS IQ DACs, bandgap, temp sensor, PLL, 4 x LDO
- LDO Linear Voltage Regulator
- Ultra-low quiescent LDO voltage regulator in TSMC 22ULL