Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
You are here:
I2C Slave
The MI2CS macro implements a synchronous single-chip I2C Slave Macro capable of linking one CPU to one I2C-bus. Communication with I2C-bus is carried out on a byte-wise basis using interrupt or polled handshake. It controls all I2C-bus specific sequences, protocol and timing. The I2C macro interface allows the parallel-bus microprocessor to communicate bidirectionnally with the I2C-bus.This macro can be customized according to specific needs (application-specific requirement). Any other pre-designed functions can be integrated into the FPGA. FPGA density and I/O requirements can be defined according to customer specification.
查看 I2C Slave 详细介绍:
- 查看 I2C Slave 完整数据手册
- 联系 I2C Slave 供应商