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RISC V IP Listing

264 IP Cores (41 - 80)

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ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications

The Synopsys ARC-V™ RMX-500 series processors are optimized for use in embedded applications where power and performance efficiency are key concerns. The DSP enhanced implementation (RMX-500D) ...

41
ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)

The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-time performance is required. The cores offer outstanding ...

42
ARC-V RMX-100 ultra-low power 32-bit RISC-V processor for embedded applications

The Synopsys ARC-V™ RMX-100 series processors are optimized for use in embedded applications where power and area are the utmost concern. The DSP enhanced implementation (RMX-100D) adds DSP ...

43
ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications

The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-time performance is required. The cores offer outstanding ...

44
32 bit RISC-V Multicore Processor with 256-bit VLEN and AMM

AndesCore™ A46MP(V) 32-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeStar™ V5 architecture and Andes Matrix Multiply (AMM) extension. ...

45
InCore Calcite Series: 32b/64b RISC-V 5-stage, scalar, in-order, Application Processor. Linux and multi-core capable. Maps upto ARM A-35. Optimal PPA.

InCore Calcite is a 32/64 Bit RISC-V in-order, single-issue 5-stage pipelined micro-processor. Built on Incore's proprietary deep-customization stack for microarchitectural exploration, Calcite ...

46
32-bit RISC-V embedded processor with TÜV SÜD ISO 26262 ASIL B certification

Codasip L31AS is a 32-bit RISC-V embedded processor with TÜV SÜD ISO 26262 ASIL B certification. Part of our safety and security offering, this embedded processor is ideal either as a Main ...

47
Low power, high performance 32-bit processor

VinRZ5110 is a low power, high performance 32-bit processor solution targeting embedded applications where low power and system cost are of utmost importance. It is based on Harvard architecture, ...

48
High Bandwidth Out-of-Order RISC-V CPU IP Core

64-bit Core ; Ready for the most demanding workloads, Atrevido supports large memory capacities with its 64-bit native data path. ; With its complete MMU support, Atrevido is also Linux-ready, ...

49
nQrux® Confidential Computing Engine (CCE)

nQrux® Confidential Computing Engine (CCE) offers customisable solutions protecting data, code execution, and AI (Artificial Intelligence) models in distributed environments, such as cloud ...

50
32位处理器，低成本，低功耗CPU

eSi-3200 32位CPU是eSi-RISC IP家族的中端处理器核。它主要面向低功耗但是又要求一定算力或者较大的地址空间的应用场景。在这些场景下，16位处理器的地址空间通常不够用。这些地...

51
32位精简指令（RISC）高性能CPU核

eSi-3250面向高性能需要缓存的应用场景。这些场景往往使用了慢速的片上内存（比如eFlash）或片外内存，或者CPU核频率大于总线频率。这枚处理器支持分离的指令和数据缓存。可以配...

52
Ceva-Waves Bluetooth 5 low energy Baseband Controller, software and profiles

Ceva-Waves Bluetooth 5 low energy IP is a comprehensive and flexible solution for integration into SoCs/ASSPs. The BLE hardware baseband controller core (BLE-BB), in charge of packet encoding/decoding ...

53
Ceva-Waves Bluetooth 5.1 low energy Baseband Controller, software and profiles

Ceva-Waves Bluetooth 5.1 low energy IP is a comprehensive and flexible solution for integration into SoCs/ASSPs. The Ceva-Waves BLE hardware baseband controller core, in charge of packet ...

54
RivieraWaves Bluetooth 5.2 dual mode Baseband Controller

CEVA's RivieraWaves Bluetooth 5.2 dual mode IP is a complete and flexible solution for integration into SoCs/ASSPs. It contains both "classic" BR/EDR Bluetooth and Bl...

55
RivieraWaves Bluetooth 5.2 low energy Baseband Controller, software and profiles

CEVA's RivieraWaves Bluetooth 5.2 low energy IP is a comprehensive and flexible solution for integration into SoCs/ASSPs. The RW-BLE hardware baseband controller c...

56
Ceva-Waves Bluetooth 5.4 dual mode Baseband Controller

Ceva-Waves Bluetooth 5.4 dual mode IP is a complete and flexible solution for integration into SoCs/ASSPs. It contains both "classic" BR/EDR Bluetooth and Bluetooth Low Energy and is compatible ...

57
32/64-bit NeuroMatrix(r) RISC Core (NMRC)

original RC Module RISC architecture; 32- and(or) 64-bit data paths; advanced Harvard architecture; extended architecture for 32- or 64-bit co-processor; 16-Gbyte address pace; dual-channel ...

58
64-bit High performance Single Core Microprocessor

VEGA AS1161 features an out-of-order processing engine with a 16 stage pipeline enabling it to meet next gen computational requirements. The processor also supports single and double precision ...

59
64-bit High performance Dual Core Microprocessor

VEGA AS2161 features a dual core out-of-order processing engine with a 16-stage pipeline for high performance compute requirements. The processor also supports single and double precision floating ...

60
Revolutionary vector processor

From early Motorola and TI DSPs to modern smartphone DSPs in application processors, DSPs have been designed and optimized for increasingly higher degree of integration, computing power, and ...

61
InCore Azurite Series: 32b/64b RISC-V 2-stage, scalar, in-order, Embedded Processor. RTOS and multi-core capable. Maps upto ARM M-4F. Optimal PPA.

InCore Azurite is an extremely compact, RISC-V 2-stage pipelined micro-processor. Built on Incore's proprietary deep-customization stack for microarchitectural exploration, Azurite delivers ...

62
RISC-V Tensor Unit

The bulk of computations in Large Language Models (LLMs) is in fully-connected layers that can be efficiently implemented as matrix multiplication. The Tensor Unit provides hardware specifically ...

63
Ultra-Low-Power Deeply Embedded RISC-V Processor

The BA51 is a highly configurable, low-power deeply embedded RISC-V processor IP core. It implements a single-issue, in-order, 2-stage execution pipeline, supporting the RISC-V 32-bit base integer ...

1 Testimonial
Hugh O’Keeffe, CEO, Ashling

64
Superscalar Out-of-Order Execution Multicore Cluster

AndesCore™ AX65 64-bit multicore CPU IP is a high-performance quad decode 13-stage superscalar out-of-order processor based on AndeStar™ V5 architecture. It supports RISC-V standard “G ...

65
Ultra-low-power RISC-V based GPU Processor

NEOX™ is a parallel multicore and multithreaded GPU architecture based on the RISC-V RV64IMFC instruction set with adaptive NoC. The number of cores varies from 4 to 64 organized in 1-16 cluster ...

66
2.5D Multi-Core Raster & Vector Graphics Processor for low-power SoCs with Microcontroller

NEMA®| pico VG brings high-quality vector and raster graphics to user interfaces in the silicon area and power-constrained microcontroller market (MCU). This GPU superstar is the perfect candidate ...

67
RISC-V GPGPU for 3D graphics and AI at the edge

NEOX® | GA100 is the leading GPGPU solution for the MCU market and world’s first GPGPU architecture based on RISC-V, offering the unique combination of performing both graphics and ΑΙ on ...

68
RISC-V Application Processor

The NOEL-V is a synthesizable VHDL model of a processor that implements the RISC-V architecture. The NOEL-V is designed for space applications: with its high-performance and fault-tolerant design, ...

69
High Bandwidth In-Order RISC-V CPU IP Core

64-bit Core ; Ready for the most demanding workloads, Avispado supports large memory capacities with its 64-bit native data path. ; With its complete MMU support, Avispado is also Linux-ready, ...

70
RISC-V Compliant Platform Level Interrupt Controller

Fully Parameterized & Programmable Platform Level Interrupt Controller (PLIC) for RISC-V based Processor Systems supporting a user-defined number of interrupt sources and targets, and featuring ...

Try this IP for Free!

71
16位精简指令架构（RISC）处理器 – 低成本 & 低功耗CPU

eSi-160016位CPU是eSi-RISC处理器家族中最小的核。它主要面向目前采用8位CPU的低功耗的应用场景，或者那些32位处理器在面积或功耗太大的场景。由于采用了精简指令（RISC）流...

72
16位精简指令架构（RISC）处理器 – 带缓存的低成本 & 低功耗CPU

eSi-1650是一款带有指令缓存的16位CPU。它主要面向目前采用8位CPU的低功耗的应用场景，或者那些32位处理器在面积或功耗太大的场景。通过集成指令缓存，在使用片上NVM核Flash作为...

73
用于物联网SoC安全的eSecure模块

The eSecure IP is a single subsystem for SoC/ASIC/FPGA to address key security challenges, playing the role of root-of-trust. The module is highly flexible and fits all applications of the ...

74

U5系列

U5系列是基于RISC-V架构支持运行Linux操作系统的AP处理器，可提供高性能和高能效比。 U5内核具有5-6级流水线并支持虚拟内存，从而支持64位RISC-V应用程序。

75

E7系列

E7系列提供32位嵌入式处理器，主要针对需要高性能和高能效比的应用产品。 E7内核具有顺序超标量发射8级流水线。

76

S7系列

S7系列提供64位嵌入式处理器，主要针对需要64位存储寻址性的高性能，实时应用。 S7内核具有顺序超标量发射8级流水线。

77

U7系列

U7系列具有目前赛昉基于RISC-V支持Linux操作系统最高性能应用处理器。 U7内核具有超标量8级流水线，并且支持虚拟内存。支持要求最高的64位RISC-V应用程序，例如Edge Compute，大数...

78

E3系列

E3系列是高度集成且功能丰富的处理器。 E3系列包括E31内核，它是世界上部署最广泛的RISC V内核。E3嵌入式内核具有5-6级流水线，在性能和能效之间实现了很好的平衡。

79

S5系列

S5系列提供64位RISC- V性能和32位功耗和面积。S5内核具有5-6级流水线，在性能和能效之间实现了很好的平衡。

80

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