The S3DA325M12BSM55LLA employs a current steering architecture with differential voltage outputs. It uses 6 linear bits and 6 binary bits, all of which are generated from within the current source array.
This segmentation results in an excellent static performance and reduced glitch energy at the output. This also ensures parasitics within the DAC are minimized. Furthermore, the distortion at the output is greatly reduced by using propriety latch architecture.
The combination of static performance, reduced glitch energy, minimized parasitics and reduced distortion, results in outstanding dynamic performance over a wide range of conditions including frequencies close to the DAC Nyquist frequency.
- 55nm SMIC LL Process, 6 Metals Used (No Analog Options)
- 3.3V and 1.2V Supplies
- Sampling Rate up to 325MS/s
- 2.6Vpp Differential Output Range
- Only 25mW at 325MS/s
- DNL< 0.5LSB Typ.; INL< 2LSB Typ.
- High Performance at 325MS/s
- SNR = 66dB, SFDR = 50dB, FOUT < 75MHz
- Stand-By and Power-Down Modes
- Compact Die Area pre-shrink: 0.29mm2
- This 12-bit DAC features an excellent static performance that includes ±0.5LSB DNL and ±1LSB INL. Dynamic performance highlights considering a signal frequency with 75MHz and 325MS/s conversion rate include an SNR of 66dB and an SFDR > 50dBc.
- The S3DA325M12BSM55LLA is designed in a SMICnm logic process, which is ideal for integration with a DSP engine, and can be cost-effectively ported across foundries and process nodes upon request.
- Characterization Report
- Flat Netlist (cdl)
- Layout View (gds2)
- Abstract View (lef)
- Timing View (lib)
- Behavioral Model (Verilog)
- Integration Support
- DVB-C, DOCSIS
- WiFi 802.11X, WiMAX 802.16x
- Wireline communications
- Direct Digital Synthesis
Block Diagram of the 12-Bit 325MS/s Current Steering DAC