LPDDR5X/5/4X/4 PHY for 16nm
The LPDDR5X/5/4X/4 combo PHY IP was designed with subsystem and system-level considerations in mind. Built-in power management logic and advanced PLL design allow aggressive power state management and optimal system power usage. At the system level, the LPDDR5X/5/4X/4 combo PHY IP was designed to minimize package substrate layer and PCB layer requirements, enabling usage in cost-sensitive applications and application processors.
OPENEDGES Technology, Inc. (OPENEDGES) is a premier provider of memory subsystem IPs for the semiconductor industry. The company offers a wide range of state-of-the-art solutions, including DDR memory controllers, DDR PHY, NoC interconnect, and NPU IPs that are widely adopted by customers worldwide. Their IPs comply with JEDEC standards, including LPDDR5X/5/4X/4/3, DDR5/4/3, GDDR6, and HBM3, ensuring their compatibility with the latest DDR technology trends. OPENEDGES' IPs are tightly combined to bring synergy for high performance and low latency when used together or even in a single use. OPENEDGES' integrated IP solutions are market and silicon-proven, featuring advanced architectures and proprietary technologies that enable customers to shorten their design and verification processes.
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Block Diagram of the LPDDR5X/5/4X/4 PHY for 16nm
LPDDR IP
- Inline Memory Encryption (IME) Security Module for DDR/LPDDR
- LPDDR Combo Controller - LPDDR4X/4 & LPDDR5T/5X/5
- DDR and LPDDR 5/4/3/2 controllers for low power and high Reliability, Availability and Serviceability (RAS) targeting automotive
- DDR and LPDDR 5/4/3/2 controllers for low power and high Reliability, Availability and Serviceability (RAS)
- DDR2/DDR3/DDR3L/LPDDR/LPDDR2/LPDDR3 6 in one combo IO with auto calibration - 40nm LL
- Universal Multiport Memory Controller - LPDDR 3/2 Controller