256x1 Bits OTP (One-Time Programmable) IP, UMC 110 nm 1.2V/3.3V L110AE Process
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10/100 Mbit Ethernet MAC
The GRETH core implements 10/100 Mbit/s Ethernet Media Access Controller (MAC) with AMBA host interface. The core implements the 802.3-2002 Ethernet standard. Receive and transmit data is autonomously transferred between the Ethernet MAC and the AMBA AHB bus using DMA transfers. Through the use of receive and transmit descriptors, multiple ethernet packets can be received and transmitted without CPU involvement. The GRETH also provides an MII interface for PHY control, and hardware support for the EDCL UDP debugging protocol. For critical space applications, a fault-tolerant version of GRETH is available with full SEU protection of all RAM blocks.
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Block Diagram of the 10/100 Mbit Ethernet MAC

Ethernet IP
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- PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency
- Ethernet Switch / Router IP Core - Efficient and Massively Customizable
- 32G Multi Rate SerDes PHY - GlobalFoundries 22FDX
- 100BASE-T1 automotive ethernet PHY
- 1000BASE-T1 & 100BASE-T1 automotive ethernet combo PHY