RT-130 Compact Root of Trust for IoT, IoT servers, gateways, edge devices
USB 2.0 High Speed Device + Host Controller (70046)
The core is an extremely low gate count design that provides an efficient USB implementation in cost-sensitive applications.
It integrates with standard UTMI-compliant PHYs or USB ULPI transceivers on USB side and AMBA AHB interfaces on the system side, supporting all major embedded microprocessor cores.
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Block Diagram of the USB 2.0 High Speed Device + Host Controller (70046)

USB IP
- USB 3.0 femtoPHY in TSMC (28nm, 16nm, 12nm)
- USB 3.0 femtoPHY, Type-C in TSMC (28nm, 16nm, 12nm)
- USB 3.0 PHY in TSMC (65nm, 55nm, 40nm, 28nm)
- USB 3.1 PHY (10G/5G) in TSMC (16nm, 12nm, 7nm, 5nm)
- Fully Self-contained Single/Multi Port USB Type-C Power Delivery IP
- Complete USB Type-C Power Delivery PHY, RTL, and Software