USB 3.2 Gen2/Gen1 PHY IP in TSMC(5nm, 6nm, 7nm,12nm/16nm, 22nm, 28nm, 40nm, 55nm)
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USB 1.1.OTG PHY IP, OTG, UMC 65nm SP process
USB 1.1 On-The-Go PHY, UMC 65nm SP/HVT Logic Low-K process.
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