MIPI D-PHY Tx-Only 4 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)
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Standard Cell (ECO) Library IP, RVT, 9 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 9-Track ECO_M1 Cell Library (C35).
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