NVM Anti-Fuse OTP NeoFuse in UMC (110nm, 80nm, 55nm, 40nm, 28nm, 22nm)
DisplayPort Receiver Link Controller
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Block Diagram of the DisplayPort Receiver Link Controller
DisplayPort Controller IP
- Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
- DisplayPort Transmitter Link Controller
- USB 3.1/DisplayPort 1.3 Controller IP Solutions
- Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
- Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 28HPC
- Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP






