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Memory & Logic Library
Standard cell
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Standard cell IP Core

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Standard cell IP Listing

1604 IP Cores (761 - 800)

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Standard Cell (MiniLib) Library IP, LVT, 7 tracks, UMC 28nm HLP process

UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library wtih LPLUS (C38).

761
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 28nm HLP process

UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track Cell Library with LMINUS (C30 RVT).

762
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 28nm HLP process

UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library.

763
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 28nm HLP process

UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track Cell Library with LPLUS (C38 RVT).

764
Standard Cell (MiniLib) Library IP, HVT, 7 tracks, UMC 40nm LP process

UMC 40nm LP/HVT Low-K Logic process 7-Track Generic Core Cell Library.

765
Standard Cell (MiniLib) Library IP, LVT, 7 tracks, UMC 40nm LP process

UMC 40nm LP/LVT Low-K Logic process 7-Track Generic Core Cell Library.

766
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 40nm LP process

UMC 40nm LP/RVT Low-K Logic process 7-Track Generic Core Cell Library.

767
Standard Cell (MiniLib) Library IP, HVT, 7 tracks, UMC 55nm LP process

UMC 55nm LP/HVT Low-K Logic process 7-Track Mini-Library.

768
Standard Cell (MiniLib) Library IP, LVT, 7 tracks, UMC 55nm LP process

UMC 55nm LP/LVT Low-K Logic process 7-Track Generic Core Cell Library.

769
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 55nm LP process

UMC 55nm LP/RVT Low-K Logic process 7-Track Generic Core Cell Library.

770
Standard Cell (MiniLib) Library IP, HVT, 7 tracks, UMC 55nm SP process

UMC 55nm SP/HVT Logic process 7-Track Mini Cell Library.

771
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 55nm SP process

UMC 55nm SP/RVT Logic process 7-Track Generic Core Cell Library.

772
Standard Cell (Ultra High Speed) Library IP, HVT, 12 tracks, UMC 55nm eHV process

UMC 55nm HV/HVT Low-K Logic process high speed Standard Core Library.

773
Standard Cell (Ultra High Speed) Library IP, HVT, 12 tracks, UMC 55nm SP process

UMC 55nm SP/HVT Low-K Logic process UHS Cell Library.

774
Standard Cell (Ultra High Speed) Library IP, HVT, 12 tracks, UMC 55nm LP process

UMC 55nm LP/HVT Low-K Logic process 12-Track Generic Core Cell Library.

775
Standard Cell PowerSlash(TM) Library IP, HVT, 12 tracks, UMC 55nm LP process

UMC 55nm LP/HVT Low-K Logic process 12-Track Generic Core Cell Library.

776
Standard Cell (Ultra High Speed) Library IP, LVT, 12 tracks, UMC 55nm LP process

UMC 55nm LP/LVT Low-K Logic process 12-Track Generic Core Cell Library.

777
Standard Cell (Ultra High Speed) Library IP, RVT, 12 tracks, UMC 55nm LP process

UMC 55nm LP/RVT Low-K Logic process 12-Track Generic Core Cell Library.

778
Standard Cell PowerSlash(TM) Library IP, 8 tracks, UMC 0.11um eFlash/HS process

UMC 0.11um eFlash/HS process 8-Track Generic Core Cell Library.

779
Standard Cell PowerSlash(TM) Library IP, 7 tracks, UMC 0.11um HS/FSG process

UMC 0.11um HS/FSG Logic process high density POWERSLASH (POWERSLASH) Core Cell Library.

780
Standard Cell PowerSlash(TM) Library IP, UMC 0.11um LL/FSG process

UMC 0.11um LL/FSG Logic process high density POWERSLASH Core Cell Library.

781
Standard Cell PowerSlash(TM) Library IP, 8 tracks, UMC 0.11um eFlash/LL process

UMC 0.11um eFlash/LL process 8-Track Cell Library.

782
Standard Cell PowerSlash(TM) Library IP, UMC 0.13um SP/FSG process

UMC 0.13um SP FSG Logic process high density POWERSLASH Core Cell Library.

783
Standard Cell PowerSlash(TM) Library IP, UMC 0.13um HS/FSG process

UMC 0.13um HS/FSG process FSC0H_J POWERSLASHKit core Library.

784
Standard Cell PowerSlash(TM) Library IP, UMC 0.13um LL/FSG process

UMC 0.13um LL FSG Logic process high density POWERSLASH Core Cell Library.

785
Standard Cell PowerSlash(TM) Library IP, RVT, 9 tracks, UMC 28nm HLP process

UMC 28nm Logic and Mixed-Mode HLP/RVT process 9-Track POWERSLASH Cell Library (C35).

786
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 28nm HLP process

UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library.

787
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 28nm HLP process

UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library.

788
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 28nm HLP process

UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library.

789
Standard Cell PowerSlash(TM) Library IP, HVT, 12 tracks, UMC 28nm HLP process

UMC 28nm Logic and Mixed-Mode HLP/HVT process 12-Track POWERSLASH Cell Library (C35).

790
Standard Cell PowerSlash(TM) Library IP, LVT, 12 tracks, UMC 28nm HLP process

UMC 28nm Logic and Mixed-Mode HLP/LVT process 12-Track POWERSLASH Cell Library (C35).

791
Standard Cell PowerSlash(TM) Library IP, RVT, 12 tracks, UMC 28nm HLP process

UMC 28nm Logic and Mixed-Mode HLP/RVT process 12-Track Standard POWERSLASH Core Cell Library (C35).

792
Standard Cell PowerSlash(TM) Library IP, HVT, 9 tracks, UMC 40nm LP process

UMC 40nm LP/HVT Logic process 9-Track Standard Cell Library (POWERSLASH Core).

793
Standard Cell PowerSlash(TM) Library IP, LVT, 9 tracks, UMC 40nm LP process

UMC 40nm LP/LVT Logic process 9-Track Standard Cell Library (POWERSLASH Core).

794
Standard Cell PowerSlash(TM) Library IP, RVT, 9 tracks, UMC 40nm LP process

UMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (POWERSLASH Core).

795
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 40nm LP process

UMC 40nm LP/HVT Low-K Logic process 7-Track POWERSLASH Cell Library.

796
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 40nm LP process

UMC 40nm LP/LVT Low-K Logic process 7-Track POWERSLASH Cell Library.

797
Standard Cell PowerSlash(TM) Library IP, HVT, 12 tracks, UMC 40nm LP process

UMC 40nm LP/HVT Logic process 12-Track high speed Cell POWERSLASH Library (C40).

798
Standard Cell PowerSlash(TM) Library IP, LVT, 12 tracks, UMC 40nm LP process

UMC 40nm LP/LVT Logic process 12-Track high speed POWERSLASH Core Cell Library.

799
Standard Cell PowerSlash(TM) Library IP, RVT, 12 tracks, UMC 40nm LP process

UMC 40nm LP/RVT Logic process 12-Track high speed POWERSLASH Cell Library (C40).

800

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