MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
SMIC 65nm LL Standard digital and oscillator IO
特色
- Standard digital and oscillator IO;
- Cell Size (Width * height) 30um * 228um with DUP stagger bonding pads;
- Work voltage: 2.5V power with 3.3V input tolerance; 3.3V power with 5V input tolerance;
- SMIC 0.065?m Logic Salicide 1.2V/2.5V low leakage Process;
- Suitable for 6, 7, 8 and 9 layers application (single top metal);
- Suitable for 6,7, 8, 9 and 10 layers application (double top metal);
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