MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
SMIC 130nm G 3V/5V input tolerance, 3.3V output under Standard IO application
特色
- 3V/5V input tolerance, 3.3V output under Standard IO application
- 5V output under Open Drain application
- Compatible with SP013D3P
- SMIC 0.13um Logic 1P8M Salicide 1.2/3.3V Process;
- Cell Size (Width * height): 35 um * 211 um with bonding pads;
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