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SATA 6G PHY
The SATA 6G PHY is a complete mixed-signal semiconductor intellectual property (IP) solution, designed for single-chip integration into SATA 6G applications. The SATA 6G PHY sata6g_pma_xN includes all the necessary logical, geometric, and physical design files to implement complete SATA 6G physical layer capability for 6-Gbps operation, connecting a host or device controller to a SATA system. The SATA 6G PHY supports the SATA 6-Gbps protocol and data rate, and is backward-compatible with SATA Gen I and Gen II operating at 1.5-Gbps and 3.0-Gbps data rates.
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SATA 6G IP
- Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more
- Multi-protocol SerDes PMA in FDSOI (GF22FDX FDX 22FDX) - PCIe1 PCIe2 PCIe3 PCIe4 and more
- SATA Host 6G Controller on Kintex 7
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 22ULP
- SATA III HOST Controller on Virtex 6
- SATA III PHY IP, Gen-3, UMC 0.11um HS/FSG process