MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
ReRAM NVM in 130nm CMOS, S130
The technology is available in SkyWater 130nm CMOS process. The technology is fully qualified, available for integration in users’ SoCs, and ready for production. The Weebit ReRAM IP module is provided in a wide range of capacities and features, and it can be customized per customer needs.
SkyWater’s 130nm technology node is a dual gate technology with 1.8V and 3.3V/5.0V devices. The technology supports up to five aluminum metal layers; and is mixed-signal enabled with native, extended drain, NPN and PNP BJTs, inductors, MIMs, etc. The technology offers a variety of thresholds to optimize for power and performance.
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