28G LR Multi-Protocol SerDes (MPS) PHY - GLOBALFOUNDRIES 12nm
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Expresso Testbench
PCIe Testbench from Rambus emulates a Root Complex device enabling simulation of a PCI Express design.
This includes the following features:
• Root Complex master requests are generated using simple test control scripts. A basic set of test cases is included with the suite to generate standard PCI Express transactions including configuration, data transfers, DMA and interrupts.
• Automatic response to DUT master requests including providing completion responses.
• Modeling of Root Complex memory regions. These memory regions are used store data being send to and received from the DUT. The data in these memory regions can be automatically checked to insure proper operation.
• Performs Root Complex physical and data-link layer functions including error detection and correction
• Logging and display of transaction layer traffic on the PCI Express bus in a user-friendly format.
The fast setup and operation of the PCIe Testbench makes it easy for users to quickly and comprehensively perform simulations of designs which include Rambus PCI Express cores.
The PCIe Testbench is not a PCI Express full compliance suite. RAMBUS recommends the use of the Avery Logic PCI-Xactor PCI Express Compliance Suite for ASIC validation.
The Testbench is compliant with PCI Express Base Specification Revision 3.0/2.0/ 1.1
Rambus also provides IP Core customization services. Contact Rambus for a quote.
This includes the following features:
• Root Complex master requests are generated using simple test control scripts. A basic set of test cases is included with the suite to generate standard PCI Express transactions including configuration, data transfers, DMA and interrupts.
• Automatic response to DUT master requests including providing completion responses.
• Modeling of Root Complex memory regions. These memory regions are used store data being send to and received from the DUT. The data in these memory regions can be automatically checked to insure proper operation.
• Performs Root Complex physical and data-link layer functions including error detection and correction
• Logging and display of transaction layer traffic on the PCI Express bus in a user-friendly format.
The fast setup and operation of the PCIe Testbench makes it easy for users to quickly and comprehensively perform simulations of designs which include Rambus PCI Express cores.
The PCIe Testbench is not a PCI Express full compliance suite. RAMBUS recommends the use of the Avery Logic PCI-Xactor PCI Express Compliance Suite for ASIC validation.
The Testbench is compliant with PCI Express Base Specification Revision 3.0/2.0/ 1.1
Rambus also provides IP Core customization services. Contact Rambus for a quote.
查看 PCIe Controller Testbench 详细介绍：
- 查看 PCIe Controller Testbench 完整数据手册
- 联系 PCIe Controller Testbench 供应商