Parametrizeable ADPCM IP Core
Our parametrizeable ADPCM IP core is technology independent and may thus be used for FPGA as well as for ASIC designs. The ADPCM IP core is parametrizeable in the number of channels to be processed. The format of the PCM signal may be defined either on a per channel basis or globally. For reducing the complexity one may skip to synchronous coding adjustment unit. This is useful for many industrial and consumer solutions.
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