The Xelic Optical Transport Network (OTN) Time Sliced Flex Framer Core (XCO4F) performs Framer/Deframer functions and OTUk/ODUk/OPUk overhead processing for any combination of ODU0, ODU1, ODU1e, ODU2, ODU2e, ODUFlex, ODU3, ODU3e, and ODU4 frame rates that combined provide a throughput up to 100Gb/s. The XCO4F supports dynamic time slice reconfiguration without interruption to existing provisioned traffic. The XCO4F contains independent Transmit and Receive processors with time sliced external ports for overhead insertion and extraction with support for ODUk streaming mode of operation for all the above specified frame rates. Delay Measurement capability is provided in both Transmit (PM/TCMi) and Receive (TCMi) processors. Client and Line side data transfers use read enable and data valid signaling at clock rates up to 180 MHz to allow for flexible system clocking schemes. A flexible data bus architecture is used for ODUk/OTUk transport to provide 640-bit transfers for FPGA applications and 320-bit transfers for ASIC implementations.
The XCO4F Transmit Processor inserts OTUk, ODUk, and OPUk overhead, calculates and inserts parity, and automatically generates Backward Defect Indication (BDI) signaling for all provisioned time slices. Programmable Trail Trace Identifier buffers are implemented for Section Monitoring (SM), Path Monitoring (PM), and Tandem Connection Monitoring (TCMi) overhead insertion. The XCO4F supports up to 6 levels of tandem connection overhead insertion and interpret for all time slices. Diagnostics support includes optional corruption of inserted parity and maintenance signal insertion. Programmable payload support includes bit synchronous, null test, and PRBS mapping types.
The XCO4F Receive Processor contains a configurable frame alignment unit with programmable options for OOF/OOM and LOFLOM algorithm state transitions for all provisioned time slices. Incoming OTUk or ODUk frames are aligned for OTN time sliced overhead processing. OTUk, ODUk, and OPUk overhead information is extracted to both time sliced internal register locations and an external overhead port. Frame alignment signal overhead is interpreted to detect and report various conditions which include OOF, OOM, and LOFLOM. ODU AIS, ODU LCK, ODU OCI and client generic AIS maintenance signals are detected with optional interrupt generation. FTFL and up to 6 levels of TCM insertion is provided. OPUk payload type mismatch error conditions are detected and support is provided for programmable payload type accept and inconsistent thresholds.
Performance counters (configurable for error sync mode) are provided for the accumulation of BIP-8 parity and BEI errors for OTU SM, ODU TCMi, and ODU PM (XCO4F receive processor) for all provisioned time slices. Counters are configurable for saturating latch and clear operation or periodic error sync auto-update mode.
The XCO4F provides facility and terminal loopback modes of operation using Transmit and Receive Processor data path configurations for system debug purposes (note that Rx Facility and Tx Terminal Loopback modes are not supported for this core).
A 16-bit generic register interface for access and configuration of internal memory mapped locations is included.