NVM MTP in TSMC (250nm, 180nm, 152nm, 65nm, 55nm, 40nm)

DesignWare® MTP EEPROM Non-Volatile Memory (NVM) IP is a Multi-Time Programmable (MTP) block developed in standard logic CMOS processes. Supporting up to 8-Kbit configurations and up to 1,000,000 write cycles with program/erase and read operations up to 125°C, the compact NVM IP enables true electrically erasable programmable read only memory (EEPROM) performance without requiring additional masks for processing steps. Delivered as a hard IP block, the low-power, reprogrammable DesignWare MTP EEPROM NVM IP operates from the core supply and includes all the necessary support and control circuitry, including all high-voltage generation and distribution required for programming. DesignWare MTP EEPROM NVM IP is available in advanced, high voltage and analog/mixed signal processes.

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