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MIPI DSI Master PHY in Samsung 28FDSOI
The MXL-DPHY-DSI-TX+ is a high-frequency low-power, source-synchronous, physical layer supporting the MIPI Alliance Specification for D-PHY v2.1, which is backward compatible with MIPI Specification for D-PHY v1.2. and D-PHY v1.1. The PHY is configured as a MIPI master supporting Display Serial interface DSI. The High-Speed signals have a low voltage swing, while Low-Power signals have large swing. High-Speed functions are used for High-Speed data traffic while low power functions are mostly used for control.
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Block Diagram of the MIPI D-PHY DSI TX+ (Transmitter) IP in Samsung 28FDSOI
Video Demo of the MIPI D-PHY DSI TX+ (Transmitter) IP in Samsung 28FDSOI
We demonstrate our customer demo, the NXP i.MX 7ULP Applications Processor, featuring the Mixel D-PHY DSI TX IP.
NXP Semiconductors i.MX 7ULP Applications Processors enable ultra-low-power and secure, portable devices. The processors' power management feature enables multimedia features and peripherals to consume minimum power in both active and various low-power modes. The processors can power such applications as smart-home controls, wearables, portable healthcare monitoring, portable printers and scanners, and gaming accessories.